An 11-bit low power column-parallel single slope ADC with comparator toggle prediction technique for CMOS image sensor

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-09-28 DOI:10.1016/j.mejo.2024.106427

Xiaolin Shi , Shaomeng Li , Kaiming Nie

引用次数: 0

Abstract

This paper proposes an 11-bit low power column-parallel SS ADC with DCDS for CMOS image sensors. The proposed SS ADC reduces the power consumption in three ways. Firstly, using a combination of coarse and fine quantization can reduce power consumption of counter. Secondly, changing the operation state can remove the bit width inverter. Thirdly, the comparator power is reduced by making each column of comparators switch off after the end of the comparison function. The proposed ADC is fabricated in a 110 nm 1P4M CMOS technology and has a DNL of +0.64/−0.54 LSB and an INL of +0.04/−6.7 LSB at a sampling frequency of 29.9 kS/s. The single column SS ADC has the power consumption ranging from 39.6 μW to 74.87 μW. Compared with the conventional SS ADC, the minimum and the maximum reduction of the power consumption are 20.1 % and 43.8 %, respectively. The average power saving is 34.5 %.

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采用比较器切换预测技术的 11 位低功耗列并行单斜率 ADC，适用于 CMOS 图像传感器

本文为 CMOS 图像传感器提出了一种带 DCDS 的 11 位低功耗列并行 SS ADC。所提出的 SS ADC 可从三个方面降低功耗。首先，采用粗量化和细量化相结合的方式可以降低计数器的功耗。其次，改变工作状态可以去除位宽反相器。第三，通过在比较功能结束后关闭每列比较器来降低比较器功耗。所提出的 ADC 采用 110 nm 1P4M CMOS 技术制造，在 29.9 kS/s 的采样频率下，DNL 为 +0.64/-0.54 LSB，INL 为 +0.04/-6.7 LSB。单列 SS ADC 的功耗范围为 39.6 μW 至 74.87 μW。与传统的 SS ADC 相比，功耗的最小值和最大值分别降低了 20.1 % 和 43.8 %。平均节电率为 34.5%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.