A 14-b BW /Power Scalable Sensor Interface With a Dynamic Bandgap Reference

IF 4.6 1区工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of Solid-state Circuits Pub Date : 2024-10-11 DOI:10.1109/JSSC.2024.3471820

Zhong Tang;Yuyan Liu;Pengpeng Chen;Haining Wang;Xiao-Peng Yu;Kofi A. A. Makinwa;Nick Nianxiong Tan

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引用次数: 0

Abstract

This article presents a 14-bit fully dynamic sensor interface that consists of a switched-capacitor (SC)

$\Delta \Sigma $

modulator and a dynamic bandgap reference (BGR). The BGR is implemented by summing the proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) outputs of two PNP-based capacitive DACs. At the sampling rate, the DAC capacitors are pre-charged to the supply and then discharged for a fixed period via PNPs, thus biasing them and simultaneously sampling their base-emitter voltages. By using the modulator’s first integrator to sum the DAC outputs, a dynamic BGR can be realized, which does not need additional reference buffers or decoupling capacitors. To make the system fully dynamic, the modulator itself is based on capacitively biased (CB) floating inverter amplifiers (FIAs). Implemented in a standard 130-nm CMOS process, the sensor interface occupies an area of 0.2 mm2. It achieves an SNDR of >84.5 dB over a scalable bandwidth (BW) ranging from 98 Hz to 5.9 kHz while consuming 1.7–

$50.8~{\mu }$

W. Furthermore, by employing a time-domain temperature-compensation scheme, it achieves a batch-trimmed gain error of ±0.26% from

$ - 40~{^{\circ } }$

C to

$125~{^{\circ } }$

查看原文本刊更多论文

具有动态带隙基准的 14-b BW /Power 可扩展传感器接口

本文介绍了一种 14 位全动态传感器接口，它由一个开关电容 (SC) $\Delta \Sigma $ 调制器和一个动态带隙基准 (BGR) 组成。BGR 通过将两个基于 PNP 的电容式 DAC 的绝对温度比例 (PTAT) 和绝对温度互补 (CTAT) 输出相加来实现。在采样率下，DAC 电容向电源预充电，然后通过 PNP 放电一段固定时间，从而使其偏置并同时对其基极-发射极电压进行采样。通过使用调制器的第一个积分器对 DAC 输出求和，可以实现动态 BGR，而无需额外的基准缓冲器或去耦电容器。为了使系统完全动态化，调制器本身采用了电容偏置（CB）浮动反相放大器（FIA）。传感器接口采用标准 130 纳米 CMOS 工艺，占地面积为 0.2 平方毫米。它在 98 Hz 至 5.9 kHz 的可扩展带宽 (BW) 范围内实现了大于 84.5 dB 的 SNDR，而功耗仅为 1.7- $50.8~\{mu }$ W。此外，通过采用时域温度补偿方案，它在 $ - 40~^{\circ }$ C 至 $125~{\circ }$ C 范围内实现了 ±0.26% 的批量修整增益误差。}$ C 到 $125~{^{\circ }$ C。}$ C.

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来源期刊

IEEE Journal of Solid-state Circuits 工程技术-工程：电子与电气

CiteScore

11.00

自引率

20.40%

发文量

351

审稿时长

3-6 weeks

期刊介绍： The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.