Design of a Fully Integrated Power Amplifier at Ka-V Band for 5G Transceivers

IF 6.9 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Avinash Singh;Amit Singh;Bargaje Ganesh Pandurang;Karun Rawat
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引用次数: 0

Abstract

A fully integrated millimeter-wave power amplifier has been designed and fabricated using a 0.13 μm SiGe BiCMOS process technology. The design is based on extracting device parasitics and utilizing them in a matching network based on a bandpass topology. This design technique assisted in attaining a wideband performance without using any on-chip inductors or transformers. The amplifier operates over the Ka & V -band ranging from 36 GHz to 53 GHz with a peak saturated power of 17.7 dBm, peak power added efficiency (PAE) of 20.5% and a gain of 19.7 dB at 46 GHz. The performance is also validated with wideband 5G signals of 50 MHz and 100 MHz channel bandwidth using 64-QAM in n262 5G NR FR2 bands (47.2 GHz–48.2 GHz). The digital predistortion is used to linearize the PA in order to qualify the required spectral mask with an error vector magnitude of 2.2%. The proposed design is compact and occupies a chip area of 1.11 mm 2 , including the pads.
为 5G 收发器设计 Ka-V 波段全集成功率放大器
采用 0.13 μm SiGe BiCMOS 工艺技术设计并制造了一款全集成毫米波功率放大器。设计的基础是提取器件寄生,并在基于带通拓扑结构的匹配网络中加以利用。这种设计技术有助于在不使用任何片上电感器或变压器的情况下实现宽带性能。该放大器工作在 36 GHz 至 53 GHz 的 Ka 和 V 波段,峰值饱和功率为 17.7 dBm,峰值功率附加效率 (PAE) 为 20.5%,46 GHz 时增益为 19.7 dB。在 n262 5G NR FR2 频段(47.2 GHz-48.2 GHz)使用 64-QAM 的 50 MHz 和 100 MHz 信道带宽的宽带 5G 信号也验证了其性能。数字预失真用于对功率放大器进行线性化,以达到所需的频谱掩码要求,误差矢量幅度为 2.2%。所提出的设计结构紧凑,包括焊盘在内的芯片面积为 1.11 平方毫米。
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来源期刊
CiteScore
10.70
自引率
0.00%
发文量
0
审稿时长
8 weeks
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