Implementation and Application of Harmonic Reset Switching in Passive Mixers

IF 4.6 1区工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of Solid-state Circuits Pub Date : 2024-10-01 DOI:10.1109/JSSC.2024.3462296

Soroush Araei;Negar Reiskarimian

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引用次数: 0

Abstract

This article covers a synthesizing methodology for addressing harmonic rejection (HR) in hard-switching passive mixers. The integration of bottom and top plate mixing provides HR at both the antenna node and the output of the mixer in a passive and low-loss manner. A prototype mixer-first receiver (RX) in 45-nm partially depleted silicon-on-insulator (PD-SOI) is implemented, consuming 34.8–64.5 mW for clock frequencies (

$f_{\text {LO}}$

) of 0.25–4 GHz and occupying an active area of 0.68 mm2. Due to the passive and early HR, it achieves an exceptional in-band (IB) harmonic blocker 1-dB compression point (B1 dB) of +14/+16.5 dBm at the third/fifth harmonics at a clock frequency of 1 GHz. Notably, with blocker powers up to 5 and 6.5 dBm at

$3f_{\text {LO}}$

and

$5f_{\text {LO}}$

, respectively, the harmonic blocker noise figure (BNF) only deteriorates by 3 dB at a clock frequency of 1 GHz. The minimal overhead of components facilitates the seamless incorporation of HR in widely tunable RXs and benefits from scaling.

查看原文本刊更多论文

无源混频器中谐波复位开关的实现与应用

本文介绍了解决硬开关无源混频器谐波抑制（HR）问题的合成方法。底板和顶板混频的集成以无源和低损耗的方式在天线节点和混频器输出端提供谐波抑制。在 45 纳米部分耗尽型硅绝缘体（PD-SOI）上实现了混频器第一接收器（RX）原型，时钟频率（$f_{\text {LO}}$）为 0.25-4 GHz 时功耗为 34.8-64.5 mW，有源面积为 0.68 mm2。由于采用了无源和早期 HR，它在 1 GHz 时钟频率下的三次/五次谐波处实现了 +14/+16.5 dBm 的带内 (IB) 谐波阻断器 1-dB 压缩点 (B1 dB)。值得注意的是，在 3f_{text {LO}}$ 和 5f_{\text {LO}}$ 时，阻断器功率分别达到 5 和 6.5 dBm 时，谐波阻断器噪声系数（BNF）在时钟频率为 1 GHz 时仅降低 3 dB。元件开销极小，有利于将谐波阻断器无缝集成到广泛可调的 RX 中，并从扩展中获益。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Journal of Solid-state Circuits 工程技术-工程：电子与电气

CiteScore

11.00

自引率

20.40%

发文量

351

审稿时长

3-6 weeks

期刊介绍： The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.