High-throughput systolic array-based accelerator for hybrid transformer-CNN networks

IF 5.2 2区 计算机科学 Q1 COMPUTER SCIENCE, INFORMATION SYSTEMS
Qingzeng Song , Yao Dai , Hao Lu , Guanghao Jin
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引用次数: 0

Abstract

In this era of Transformers enjoying remarkable success, Convolutional Neural Networks (CNNs) remain highly relevant and useful. Indeed, hybrid Transformer-CNN network architectures, which combine the benefits of both approaches, have achieved impressive results. Vision Transformer (ViT) is a significant neural network architecture that features a convolutional layer as its first layer, primarily built on the transformer framework. However, owing to the distinct computation patterns inherent in attention and convolution, existing hardware accelerators for these two models are typically designed separately and lack a unified approach toward accelerating both models efficiently. In this paper, we present a dedicated accelerator on a field-programmable gate array (FPGA) platform. The accelerator, which integrates a configurable three-dimensional systolic array, is specifically designed to accelerate the inferential capabilities of hybrid Transformer-CNN networks. The Convolution and Transformer computations can be mapped to a systolic array by unifying these operations for matrix multiplication. Softmax and LayerNorm which are frequently used in hybrid Transformer-CNN networks were also implemented on FPGA boards. The accelerator achieved high performance with a peak throughput of 722 GOP/s at an average energy efficiency of 53 GOPS/W. Its respective computation latencies were 51.3 ms, 18.1 ms, and 6.8 ms for ViT-Base, ViT-Small, and ViT-Tiny. The accelerator provided a 12× improvement in energy efficiency compared to the CPU, a 2.3× improvement compared to the GPU, and a 1.5× to 2× improvement compared to existing accelerators regarding speed and energy efficiency.
基于高通量收缩阵列的混合变压器-网络加速器
在变压器取得巨大成功的今天,卷积神经网络(CNN)仍然非常重要和有用。事实上,结合了变形器和 CNN 两种方法优点的混合变形器-CNN 网络架构已经取得了令人瞩目的成果。视觉变换器(ViT)是一种重要的神经网络架构,其第一层为卷积层,主要建立在变换器框架之上。然而,由于注意力和卷积的固有计算模式不同,这两种模型的现有硬件加速器通常是分开设计的,缺乏一种统一的方法来高效地加速这两种模型。在本文中,我们在现场可编程门阵列(FPGA)平台上提出了一种专用加速器。该加速器集成了一个可配置的三维收缩阵列,专门用于加速混合变换器-CNN 网络的推理能力。通过统一矩阵乘法运算,卷积和变换器计算可以映射到合成阵列中。在混合变换器-CNN 网络中经常使用的 Softmax 和 LayerNorm 也在 FPGA 板上实现。加速器实现了高性能,峰值吞吐量为 722 GOP/s,平均能效为 53 GOPS/W。ViT-Base、ViT-Small 和 ViT-Tiny 的计算延迟分别为 51.3 毫秒、18.1 毫秒和 6.8 毫秒。与 CPU 相比,该加速器的能效提高了 12 倍;与 GPU 相比,提高了 2.3 倍;与现有加速器相比,在速度和能效方面提高了 1.5 倍至 2 倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
10.50
自引率
8.70%
发文量
656
审稿时长
29 days
期刊介绍: In 2022 the Journal of King Saud University - Computer and Information Sciences will become an author paid open access journal. Authors who submit their manuscript after October 31st 2021 will be asked to pay an Article Processing Charge (APC) after acceptance of their paper to make their work immediately, permanently, and freely accessible to all. The Journal of King Saud University Computer and Information Sciences is a refereed, international journal that covers all aspects of both foundations of computer and its practical applications.
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