{"title":"A 0.075 mm2 BJT-based temperature sensor with a one-point trimmed 3σ inaccuracy of ±0.97 °C from −40 °C to 120 °C","authors":"Xinquan Lai, Zhiwen Niu, Bingyuan Wang, Linxi Li","doi":"10.1016/j.mejo.2024.106418","DOIUrl":null,"url":null,"abstract":"<div><p>This paper presents a bipolar junction transistor (BJT)-based CMOS temperature sensor for high accuracy, small-scale area, and low power consumption. A structure with a feedback amplifier biasing NPN transistors, combined with dynamic element matching (DEM), is proposed to avoid the effects of errors arising from the limited current gain of substrate PNP transistors in deep-submicron processes. Moreover, the switched capacitor (SC) integrators employ two single-stage cascode amplifiers for alternating cyclic sampling and integration, effectively simplifying the circuit design and reducing the operating voltage. The proposed sensor is fabricated with a standard 180 nm CMOS process, occupying an active chip area of 0.075 mm<sup>2</sup>. It consumes 39.1 <span><math><mi>μ</mi></math></span>W of power at room temperature, operating with a supply voltage of 1.8 V. The measurements indicate that the sensor exhibits an inaccuracy of ±0.97 °C (3<span><math><mi>σ</mi></math></span>) across the temperature range from −40 °C to 120 °C following a single-point temperature calibration.</p></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S187923912400122X","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a bipolar junction transistor (BJT)-based CMOS temperature sensor for high accuracy, small-scale area, and low power consumption. A structure with a feedback amplifier biasing NPN transistors, combined with dynamic element matching (DEM), is proposed to avoid the effects of errors arising from the limited current gain of substrate PNP transistors in deep-submicron processes. Moreover, the switched capacitor (SC) integrators employ two single-stage cascode amplifiers for alternating cyclic sampling and integration, effectively simplifying the circuit design and reducing the operating voltage. The proposed sensor is fabricated with a standard 180 nm CMOS process, occupying an active chip area of 0.075 mm2. It consumes 39.1 W of power at room temperature, operating with a supply voltage of 1.8 V. The measurements indicate that the sensor exhibits an inaccuracy of ±0.97 °C (3) across the temperature range from −40 °C to 120 °C following a single-point temperature calibration.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.