A local positive feedback loop-reused technique for enhancing performance of folded cascode amplifier

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
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引用次数: 0

Abstract

A current-reused folded cascode operational transconductance amplifier (OTA) using a local positive feedback (LPFB) technique has been proposed in previous literature, which does not achieve maximum unity gain-bandwidth (GBW). Besides, the stability of LPFB in the LPFB-OTA is limited by local common mode feedback (LCMFB) resistors. Based on the analysis, a local positive feedback loop-reused (LPFBR) technique is proposed to improve the performance of conventional LPFB OTA. For a fair comparison, both conventional and proposed OTAs working at saturation region are designed and simulated in SMIC 0.18μm process. The simulated results demonstrate that the proposed LPFBR-OTA has almost 10.5 times the bandwidth and maintains stability compared to that of the conventional LPFB-OTA under the condition that LCMFB resistors are increased by a factor of 10.

提高折叠式级联放大器性能的局部正反馈回路重复使用技术
以前的文献提出了一种采用局部正反馈(LPFB)技术的电流复用折叠级联运算跨导放大器(OTA),但这种放大器无法实现最大统一增益带宽(GBW)。此外,LPFB-OTA 中 LPFB 的稳定性受到本地共模反馈(LCMFB)电阻的限制。在分析的基础上,提出了一种本地正反馈回路重复使用(LPFBR)技术,以改善传统 LPFB OTA 的性能。为了进行公平比较,在中芯国际 0.18μm 工艺中设计并仿真了工作在饱和区的传统和拟议 OTA。仿真结果表明,在 LCMFB 电阻增加 10 倍的条件下,拟议的 LPFBR-OTA 的带宽几乎是传统 LPFB-OTA 的 10.5 倍,并且保持稳定。
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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