Investigation of Optical Interconnects for nano-scale VLSI applications

Abstract

The relentless trend toward miniaturization has brought interconnects to the brink of communication bottlenecks, operating at or near their ampacity (current carrying capacity) limits. This degradation in performance necessitates novel technologies with increased ampacity. This study explores optical interconnect (OI) as a potential future technology, offering high-bandwidth communication and low latency. This study models and simulates OI, integrating recent optical device advancements with modest modulator and detector capacitance (50 fF). Performance metrics including signal delay, power dissipation, and power-delay-product (PDP) are compared across copper (Cu) and single-wall carbon nanotube bundle (SWCNT-B) interconnects at 22 nm and 14 nm technology nodes. Results consistently show OI, with an active voltage current feedback (AVCF) based regulated gain cascode (RGC) transimpedance amplifier (TIA) receiver, outperforms Cu and SWCNT-B interconnects at global lengths and beyond. For instance, at 1000 μm and 22 nm, OI exhibits 88.47 % and 62.15 % delay improvements over Cu and SWCNT-B, respectively. This trend persists at 14 nm, with OI showing 93.68 % and 84.29 % delay improvements, respectively. Additionally, OI surpasses Cu and SWCNT-B in power efficiency beyond a critical length. As interconnects extend to global scales and beyond, the differences in delay, power, and PDP between OI and electrical interconnect increases, highlighting OI's advantages for future VLSI IC applications.