A Novel TriNet Architecture for Enhanced Analog IC Design Automation

Abstract

Analog integrated circuit (IC) design and its automation pose significant challenges due to the time-consuming mathematical computations and complexity of circuit design. Though efforts have been made to automate the analog design flow, the current approach falls short in meeting the exact design requirements and plagued by inaccuracies, highlighting the necessity for a more robust approach capable of accurately predicting circuits. In addition, there is a need for an improved dataset collection technique to enhance the overall performance of the automation process. The power management unit (PMU) is a crucial block in any IC that requires the design of low-dropout regulator (LDO) for which amplifiers are fundamental blocks. This research harnesses the capabilities of deep neural networks (DNNs) to automate essential amplifier blocks, such as the differential amplifier (DiffAmp) and two-stage operational amplifier (OpAmp). In addition, it proposes an automation framework for the higher level circuitry of the LDO. This article introduces a novel “TriNet” architecture designed for various parameters of amplifiers, including gain, bandwidth, and power facilitating precise predictions for DiffAmp and OpAmp, and presents a decoder architecture tailored for LDO. A notable aspect is the development of an efficient technique for acquiring larger datasets in a condensed timeframe. The presented methodologies demonstrate high accuracy rates, achieving 97.3% for DiffAmp and OpAmp circuits and 94.3% for LDO design.