Cheng Liu, Jiaqing Zhao, Yang Zhang, Zhennan Xi, Jiawei Deng, Xiangdong Luo
{"title":"Calibration on timing skew mismatch of time‐interleaved ADC based on optimized adaptive genetic algorithm back‐propagation neural network","authors":"Cheng Liu, Jiaqing Zhao, Yang Zhang, Zhennan Xi, Jiawei Deng, Xiangdong Luo","doi":"10.1002/cta.4252","DOIUrl":null,"url":null,"abstract":"Aiming to address the timing skew mismatch in the time‐interleaved analog‐to‐digital converter (TIADC) system, this paper presents a timing skew mismatch calibration method based on a back propagation (BP) neural network optimized by an adaptive genetic algorithm (AGA). In this paper, a trained BP neural network is used to detect the timing skew mismatch in the TIADC system, and the variable delay line is used to calibrate it. In this paper, AGA is used to optimize the BP neural network, accelerating its training speed and improving the detection accuracy of timing skew mismatch in the system. The proposed approach boasts superior detection speed and accuracy compared to other methods. In this paper, an 18‐bit 1GS/S 4‐channel TIADC system is simulated and the timing skew mismatch in the system is corrected. Simulation results show that the proposed calibration method has fast detection speed, high detection accuracy, and calibration accuracy. After completing the timing skew mismatch correction, the performance of the TIADC system is dramatically improved. The effective number of bits (ENOB) of the system increases by 9.5 bits, and the spurious‐free dynamic range (SFDR) increases by 59.9 dB.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"18 1","pages":""},"PeriodicalIF":1.8000,"publicationDate":"2024-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Circuit Theory and Applications","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1002/cta.4252","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Aiming to address the timing skew mismatch in the time‐interleaved analog‐to‐digital converter (TIADC) system, this paper presents a timing skew mismatch calibration method based on a back propagation (BP) neural network optimized by an adaptive genetic algorithm (AGA). In this paper, a trained BP neural network is used to detect the timing skew mismatch in the TIADC system, and the variable delay line is used to calibrate it. In this paper, AGA is used to optimize the BP neural network, accelerating its training speed and improving the detection accuracy of timing skew mismatch in the system. The proposed approach boasts superior detection speed and accuracy compared to other methods. In this paper, an 18‐bit 1GS/S 4‐channel TIADC system is simulated and the timing skew mismatch in the system is corrected. Simulation results show that the proposed calibration method has fast detection speed, high detection accuracy, and calibration accuracy. After completing the timing skew mismatch correction, the performance of the TIADC system is dramatically improved. The effective number of bits (ENOB) of the system increases by 9.5 bits, and the spurious‐free dynamic range (SFDR) increases by 59.9 dB.
期刊介绍:
The scope of the Journal comprises all aspects of the theory and design of analog and digital circuits together with the application of the ideas and techniques of circuit theory in other fields of science and engineering. Examples of the areas covered include: Fundamental Circuit Theory together with its mathematical and computational aspects; Circuit modeling of devices; Synthesis and design of filters and active circuits; Neural networks; Nonlinear and chaotic circuits; Signal processing and VLSI; Distributed, switched and digital circuits; Power electronics; Solid state devices. Contributions to CAD and simulation are welcome.