Experimental analysis of irregularly shaped octagonal on-chip inductors for improving area-efficiency in CMOS RFICs for millimeter wave applications

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
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Abstract

This article deals with the analysis of irregularly shaped single turn octagonal spiral inductors for millimeter-wave and sub-THz CMOS IC designs. Simulations and experimental results, along with theoretical formulations, are used to characterize these irregular structures. This article proposes a novel approach for efficient use of silicon chip area by reshaping the on-chip inductors used in millimeter wave (mm-wave) applications without compromising the performance of the inductors. Especially in CMOS RFICs when a space constraint exists in either X- or Y-direction in their layout, such reshaping can be attempted. Moreover, two novel methods of reshaping the inductors are proposed and studied thoroughly. The study of these irregular shapes has interesting conclusions, which are validated through on-wafer measurements. Certain methods of reshaping result in inductors which do not have degradation in their quality factors (Q), while other approaches degrade the Q. Based on these insights, a design methodology is proposed for designers who need to reshape their inductors to irregular structures while not compromising on the quality factor. The measurement results agree with the simulations and prove that the proposed reshaping is practically possible.

用于提高毫米波应用 CMOS 射频集成电路面积效率的不规则八边形片上电感器实验分析
本文分析了用于毫米波和超高频 CMOS 集成电路设计的不规则形状单匝八角螺旋电感器。仿真和实验结果以及理论公式被用来描述这些不规则结构的特征。本文提出了一种新方法,通过重塑毫米波(mm-wave)应用中使用的片上电感器,在不影响电感器性能的前提下有效利用硅芯片面积。特别是在 CMOS 射频集成电路中,当其布局的 X 或 Y 方向存在空间限制时,可以尝试这种重塑方法。此外,我们还提出并深入研究了两种重塑电感器的新方法。对这些不规则形状的研究得出了有趣的结论,并通过晶圆上的测量进行了验证。某些重塑方法会导致电感器的品质因数(Q 值)不降低,而其他方法则会降低 Q 值。基于这些见解,我们为需要将电感器重塑为不规则结构同时又不影响品质因数的设计人员提出了一种设计方法。测量结果与模拟结果一致,证明所提出的重塑方法切实可行。
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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