Abdelrahman A. Mohammad , Mohamed A.Y. Abdalla , Hesham Omran
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引用次数: 0
Abstract
A robust systematic gm/ID-based design procedure for a CMOS low-voltage bandgap reference is introduced. The proposed approach is technology node independent, and it eliminates invoking the simulator in the loop by using precomputed lookup tables (LUTs) generated once. The proposed methodology is capable of addressing the impact of PVT corners and random mismatch. The proposed procedure is verified against Spectre simulations and yields very accurate results. Moreover, the bandgap reference automated synthesis procedure is fully vectorized, enabling the concurrent synthesis of multiple design points in a short time. As a result, large datasets can be generated to span the whole design space, which enables global optimization. Next, local optimization algorithms can be utilized to quickly determine the degrees of freedom of an optimal design point that meets a set of specifications. The speedup of the proposed methodology is around 140x compared to simulation-based optimization in addition to accomplishing better results.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.