A fast-switching and ultra low-loss snapback-free reverse-conducting SOI-LIGBT with Adjustable Carrier Technology

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-08-03 DOI:10.1016/j.mejo.2024.106358

{"title":"A fast-switching and ultra low-loss snapback-free reverse-conducting SOI-LIGBT with Adjustable Carrier Technology","authors":"","doi":"10.1016/j.mejo.2024.106358","DOIUrl":null,"url":null,"abstract":"<div>A snapback-free Reverse-Conduction Silicon On Insulator Lateral Insulate Gate Bipolar Transistor (RC SOI-LIGBT) with Adjustable Carrier Technology (ACT LIGBT) is proposed in this paper. ACT LIGBT adds Semi-Insulating Polycrystalline Silicon (SIPOS) material on the extended gate dielectric, and introduces the potential of the surface SIPOS into the P-type drift region (P-Drift) through SiO2 trenches. ACT LIGBT generates the inversion layer of electrons in the P-Drift due to the linear potential distribution brought by the high resistance characteristic of SIPOS, resulting in the adjustment of the number of electrons and holes, and forming the technology of ACT. Additionally, ACT LIGBT adds a hole extraction path during it turned off. Meanwhile, compared to SSA LIGBT, ACT LIGBT optimized the BV (700V) by 34 %, while also optimizing the Von (1.69V) by 25 %, turn-off time (toff = 12ns) by 92 %, turn-off loss (Eoff = 0.69 mJ/cm2) by 79 %, and reverse recovery charge (Qrr = 32.98 μC/cm2) by 32.5 %, ultimately achieving a better compromise relationship among BV, Von, toff, Eoff, and Qrr.</div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124000626","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

Abstract

A snapback-free Reverse-Conduction Silicon On Insulator Lateral Insulate Gate Bipolar Transistor (RC SOI-LIGBT) with Adjustable Carrier Technology (ACT LIGBT) is proposed in this paper. ACT LIGBT adds Semi-Insulating Polycrystalline Silicon (SIPOS) material on the extended gate dielectric, and introduces the potential of the surface SIPOS into the P-type drift region (P-Drift) through SiO₂ trenches. ACT LIGBT generates the inversion layer of electrons in the P-Drift due to the linear potential distribution brought by the high resistance characteristic of SIPOS, resulting in the adjustment of the number of electrons and holes, and forming the technology of ACT. Additionally, ACT LIGBT adds a hole extraction path during it turned off. Meanwhile, compared to SSA LIGBT, ACT LIGBT optimized the BV (700V) by 34 %, while also optimizing the V_on (1.69V) by 25 %, turn-off time (t_off = 12ns) by 92 %, turn-off loss (E_off = 0.69 mJ/cm²) by 79 %, and reverse recovery charge (Q_rr = 32.98 μC/cm²) by 32.5 %, ultimately achieving a better compromise relationship among BV, V_on, t_off, E_off, and Q_rr.

查看原文本刊更多论文

采用可调载流子技术的快速开关超低损耗无反向回扣 SOI-LIGBT

本文提出了一种采用可调载流子技术（ACT LIGBT）的无卡回反向传导绝缘体硅侧绝缘栅双极晶体管（RC SOI-LIGBT）。ACT LIGBT 在扩展栅极电介质上添加了半绝缘多晶硅（SIPOS）材料，并通过二氧化硅沟槽将表面 SIPOS 的电位引入 P 型漂移区（P-Drift）。由于 SIPOS 的高电阻特性带来的线性电位分布，ACT LIGBT 在 P 型漂移区产生了电子反转层，从而调整了电子和空穴的数量，形成了 ACT 技术。此外，ACT LIGBT 还在关闭时增加了一条空穴提取路径。同时，与 SSA LIGBT 相比，ACT LIGBT 的 BV（700V）优化了 34%，Von（1.69V）优化了 25%，关断时间（toff = 12ns）优化了 92%，关断损耗（Eoff = 0.69 mJ/cm2）优化了 79%，反向恢复电荷（Qrr = 32.98 μC/cm2）优化了 32.5%，最终在 BV、Von、toff、Eoff 和 Qrr 之间实现了更好的折衷关系。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.