BSTCIM: A Balanced Symmetry Ternary Fully Digital In-MRAM Computing Macro for Energy Efficiency Neural Network

IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Zhongzhen Tong;Chenghang Li;Chao Wang;Suteng Zhao;Qianyong Peng;Zhenyu Yan;Siqi Zhang;Daming Zhou;Zhaohao Wang;Xiaoyang Lin;Weisheng Zhao
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Abstract

Silicon-based traditional binary computing in-memory (TBCIM) architectures are approaching their energy efficiency and throughput limits owing to challenges facing Moore’s Law. Thus, it is essential to explore architecture based on novel devices and computing paradigms to fulfill data-centric applications, such as artificial intelligence. In this paper, we propose a balanced symmetry ternary (BST) fully digital in-MRAM computing macro (BSTCIM) using hybrid voltage-gated spin-orbit torque magnetic tunnel junctions (VGSOT-MTJ) and gate-all-around carbon nanotube field-effect-transistors (GAA-CNTFET) technology. The overall computing is based on the highest efficiency multi-bit ternary system. BSTCIM includes a ternary dot product (TDP) unit with 4 GAA-CNTFETs and 2 VGSOT-MTJs achieving TDP operation without complex logic circuits. The multi-bit ternary multiply-and-accumulate (MAC) operation is realized through the proposed ternary adder tree and ternary post adder which accumulate TDP results within the digital domain enabling high accuracy neural network inference. Furthermore, due to the advantages of BST, ternary signed MAC is more easily performed compared to TBCIM macros that adapt 2’s complement or separate signed bit calculations. BSTCIM with 288 kb is simulated, achieving throughput and energy efficiency of 0.72 TOPS and 54.5 TOPS/W, respectively, at a 0.6 V supply voltage and 1.15 TOPS and 33.7 TOPS/W, respectively at a 0.8 V supply voltage with 8b-IN, 8b-W, and 20b-OUT. Moreover, the figure-of-merit for BSTCIM is 1.13–33.6 times higher than that of existing CIM macros.
BSTCIM:面向能效神经网络的平衡对称三元全数字 In-MRAM 计算宏
由于摩尔定律面临的挑战,基于硅的传统二进制内存计算(TBCIM)架构的能效和吞吐量已接近极限。因此,必须探索基于新型设备和计算模式的架构,以满足以数据为中心的应用,如人工智能。在本文中,我们利用混合电压门控自旋轨道力矩磁隧道结(VGSOT-MTJ)和全栅碳纳米管场效应晶体管(GAA-CNTFET)技术,提出了一种平衡对称三元(BST)全数字内存计算宏(BSTCIM)。整体计算基于最高效率的多位三元系统。BSTCIM 包括一个三元点乘法(TDP)单元,其中有 4 个 GAA-CNTFET 和 2 个 VGSOT-MTJ,无需复杂的逻辑电路即可实现 TDP 运算。多位三元乘法累加 (MAC) 运算是通过所提出的三元加法器树和三元后置加法器实现的,它们在数字域内累加 TDP 结果,从而实现了高精度的神经网络推理。此外,由于 BST 的优势,三元带符号 MAC 与采用 2 的补码或单独带符号位计算的 TBCIM 宏相比更容易执行。对具有 288 kb 的 BSTCIM 进行了仿真,在 0.6 V 电源电压下,吞吐量和能效分别达到 0.72 TOPS 和 54.5 TOPS/W;在 0.8 V 电源电压下,8b-IN、8b-W 和 20b-OUT 的吞吐量和能效分别达到 1.15 TOPS 和 33.7 TOPS/W。此外,BSTCIM 的性能比是现有 CIM 宏的 1.13-33.6 倍。
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来源期刊
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems I: Regular Papers 工程技术-工程:电子与电气
CiteScore
9.80
自引率
11.80%
发文量
441
审稿时长
2 months
期刊介绍: TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.
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