DLB-CNet: Difference Learning-Based Convolution Network for Building Change Detection

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Zipeng Fan;Sanqian Wang;Xueting Pu;Yuting Cong;Yuan Liu;Xiubao Sui;Qian Chen
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引用次数: 0

Abstract

Change detection (CD) in remote sensing (RS) images is a technique used to analyze and characterize surface changes from remotely sensed data at different time periods. However, current deep-learning-based methods sometimes struggle with the diversity of targets in complex RS scenarios, leading to issues, such as false detections and loss of detail. To address these challenges, we propose a method called difference learning-based convolution and network (DLB-CNet) for building CD (BCD). In DLB-CNet, we use difference learning module (DLM), accomplishing the extraction of building change features by enhancing the feature differences between the two images and enhancing model robustness. Additionally, an innovative attention module called integration attention (IA) is introduced to efficiently process semantic information by jointly focusing on global representation subspaces. Our model achieves impressive results on the LEVIR-CD dataset, WHU-CD dataset, and CDD dataset, with ${F}1$ -scores of 90.56%, 92.28%, and 94.98%, respectively, demonstrating its superiority over the state-of-the-art methods.
DLB-CNet:用于建筑物变化检测的基于差分学习的卷积网络
遥感(RS)图像中的变化检测(CD)是一种用于分析和描述不同时间段遥感数据表面变化的技术。然而,目前基于深度学习的方法有时难以应对复杂 RS 场景中目标的多样性,从而导致误检测和细节丢失等问题。为了应对这些挑战,我们提出了一种名为基于差分学习的卷积和网络(DLB-CNet)的方法,用于构建 CD(BCD)。在 DLB-CNet 中,我们使用了差异学习模块(DLM),通过增强两幅图像之间的特征差异来完成建筑物变化特征的提取,并增强模型的鲁棒性。此外,我们还引入了创新的注意力模块--整合注意力(IA),通过共同关注全局表示子空间来有效处理语义信息。我们的模型在LEVIR-CD数据集、WHU-CD数据集和CDD数据集上取得了令人印象深刻的结果,{F}1$得分率分别为90.56%、92.28%和94.98%,这表明它优于最先进的方法。
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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