Natural Language Processing for Hardware Security: Case of Hardware Trojan Detection in FPGAs

IF 16.4 1区化学 Q1 CHEMISTRY, MULTIDISCIPLINARY

Accounts of Chemical Research Pub Date : 2024-08-08 DOI:10.3390/cryptography8030036

Jaya Dofe, Wafi Danesh, Vaishnavi More, Aaditya Chaudhari

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引用次数: 0

Abstract

Field-programmable gate arrays (FPGAs) offer the inherent ability to reconfigure at runtime, making them ideal for applications such as data centers, cloud computing, and edge computing. This reconfiguration, often achieved through remote access, enables efficient resource utilization but also introduces critical security vulnerabilities. An adversary could exploit this access to insert a dormant hardware trojan (HT) into the configuration bitstream, bypassing conventional security and verification measures. To address this security threat, we propose a supervised learning approach using deep recurrent neural networks (RNNs) for HT detection within FPGA configuration bitstreams. We explore two RNN architectures: basic RNN and long short-term memory (LSTM) networks. Our proposed method analyzes bitstream patterns, to identify anomalies indicative of malicious modifications. We evaluated the effectiveness on ISCAS 85 benchmark circuits of varying sizes and topologies, implemented on a Xilinx Artix-7 FPGA. The experimental results revealed that the basic RNN model showed lower accuracy in identifying HT-compromised bitstreams for most circuits. In contrast, the LSTM model achieved a significantly higher average accuracy of 93.5%. These results demonstrate that the LSTM model is more successful for HT detection in FPGA bitstreams. This research paves the way for using RNN architectures for HT detection in FPGAs, eliminating the need for time-consuming and resource-intensive reverse engineering or performance-degrading bitstream conversions.

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硬件安全的自然语言处理：FPGA 中的硬件木马检测案例

现场可编程门阵列（FPGA）具有运行时重新配置的固有能力，是数据中心、云计算和边缘计算等应用的理想选择。这种通常通过远程访问实现的重新配置可提高资源利用效率，但也带来了严重的安全漏洞。对手可能会利用这种访问权限，在配置比特流中插入休眠硬件木马（HT），从而绕过传统的安全和验证措施。为了应对这一安全威胁，我们提出了一种使用深度递归神经网络（RNN）的监督学习方法，用于检测 FPGA 配置比特流中的 HT。我们探索了两种 RNN 架构：基本 RNN 和长短期记忆 (LSTM) 网络。我们提出的方法分析比特流模式，以识别表明存在恶意修改的异常情况。我们在 Xilinx Artix-7 FPGA 上实现的不同规模和拓扑结构的 ISCAS 85 基准电路上评估了该方法的有效性。实验结果表明，对于大多数电路，基本 RNN 模型在识别 HT 攻击比特流方面的准确率较低。相比之下，LSTM 模型的平均准确率明显更高，达到 93.5%。这些结果表明，LSTM 模型在 FPGA 比特流的 HT 检测中更为成功。这项研究为在 FPGA 中使用 RNN 架构进行 HT 检测铺平了道路，从而消除了耗时耗资源的逆向工程或性能下降的比特流转换的需要。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Accounts of Chemical Research 化学-化学综合

CiteScore

31.40

自引率

1.10%

发文量

312

审稿时长

2 months

期刊介绍： Accounts of Chemical Research presents short, concise and critical articles offering easy-to-read overviews of basic research and applications in all areas of chemistry and biochemistry. These short reviews focus on research from the author’s own laboratory and are designed to teach the reader about a research project. In addition, Accounts of Chemical Research publishes commentaries that give an informed opinion on a current research problem. Special Issues online are devoted to a single topic of unusual activity and significance. Accounts of Chemical Research replaces the traditional article abstract with an article "Conspectus." These entries synopsize the research affording the reader a closer look at the content and significance of an article. Through this provision of a more detailed description of the article contents, the Conspectus enhances the article's discoverability by search engines and the exposure for the research.