Digital Circuit Design for the Square Root Computation by Means of Unfolding Techniques

IF 1.7 4区计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Embedded Systems Letters Pub Date : 2024-07-29 DOI:10.1109/les.2024.3435477

Ricardo Paez Villa, Jorge Rivera, Juan José Raygoza, Edwin Becerra, Susana Ortega

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利用展开技术进行平方根计算的数字电路设计

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Embedded Systems Letters Engineering-Control and Systems Engineering

CiteScore

3.30

自引率

0.00%

发文量

期刊介绍： The IEEE Embedded Systems Letters (ESL), provides a forum for rapid dissemination of latest technical advances in embedded systems and related areas in embedded software. The emphasis is on models, methods, and tools that ensure secure, correct, efficient and robust design of embedded systems and their applications.