{"title":"A power-efficient fast-transient OCL-LDO with adaptive super source follower and active capacitor compensation management","authors":"Yiling Xie , Baochuang Wang , Tianrui Lyu , Jiang Xiong , Jianping Guo","doi":"10.1016/j.mejo.2024.106349","DOIUrl":null,"url":null,"abstract":"<div><p>This paper presents a flipped voltage follower (FVF) based output-capacitor-less low-dropout regulator (OCL-LDO) with fast transient response, high power supply rejection (PSR), and low quiescent current for noise-sensitive circuits in internet-of-things (IoTs). An adaptive super source follower (ASSF) is proposed to effectively reduce the output impedance of the voltage buffer under heavy-loading conditions while keeping a low quiescent current under light-loading conditions. The active capacitor compensation management (ACCM) is proposed to solve the charge-sharing problem caused by the floating capacitors in the dynamic capacitor compensation circuit. The proposed OCL-LDO has been designed and fabricated in 22-nm CMOS technology. It can stabilize with load current ranging from 0 to 12 mA while consuming only 4.8-μA quiescent current. when the load current steps from 0.1 to 10 mA within 3.8 ns, the measured voltage undershoot is 55 mV and the recovery time is about 60 ns.</p></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124000535","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a flipped voltage follower (FVF) based output-capacitor-less low-dropout regulator (OCL-LDO) with fast transient response, high power supply rejection (PSR), and low quiescent current for noise-sensitive circuits in internet-of-things (IoTs). An adaptive super source follower (ASSF) is proposed to effectively reduce the output impedance of the voltage buffer under heavy-loading conditions while keeping a low quiescent current under light-loading conditions. The active capacitor compensation management (ACCM) is proposed to solve the charge-sharing problem caused by the floating capacitors in the dynamic capacitor compensation circuit. The proposed OCL-LDO has been designed and fabricated in 22-nm CMOS technology. It can stabilize with load current ranging from 0 to 12 mA while consuming only 4.8-μA quiescent current. when the load current steps from 0.1 to 10 mA within 3.8 ns, the measured voltage undershoot is 55 mV and the recovery time is about 60 ns.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.