Novel superjunction Fin-based NiO/β-Ga2O3 HJFET with additional surface drift region channels for record-high performance

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-07-17 DOI:10.1016/j.mejo.2024.106325

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引用次数: 0

Abstract

—In this paper, a novel superjunction ﬁn-based NiO/β-Ga₂O₃ heterojunction ﬁeld-effect transistor (SJ Fin-HJFET) is proposed and studied by simulations. Compared with the conventional Ga₂O₃ SJ FinFET, Ga₂O₃ SJ Fin-HJFET can generate surface conduction channels instead of depletion zones near the p-n junction interface in the SJ drift region. The additional surface conduction channel significantly improves the specific on-resistance of the SJ Fin-HJFET (from 1.091 mΩ cm² to 0.397 mΩ cm², reduced by 63.6 %) and dramatically improves the Baliga figure of merit (BFOM, form 11.75 GW/cm² to 32.28 GW/cm²) at the same breakdown voltage (3580 V). The effect of different conduction band offset (ΔE_C) on the performance of the SJ Fin-HJFET is also investigated. The simulation results show that the on-resistance advantage of the SJ Fin-HJFET applies to a wide range of ΔE_C, exhibiting strong applicability and stability. These results indicate that the SJ Fin-HJFET has record-high performance and promising application prospects.

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基于鳍片的新型超结 NiO/β-Ga2O3 HJFET，具有额外的表面漂移区通道，可实现创纪录的高性能

-本文提出了一种新颖的基于 NiO/β-Ga2O3 异质结的超结ﬁn 型场效应晶体管（SJ Fin-HJFET），并对其进行了模拟研究。与传统的 Ga2O3 SJ FinFET 相比，Ga2O3 SJ Fin-HJFET 可以在 SJ 漂移区的 p-n 结界面附近产生表面传导通道，而不是耗尽区。额外的表面传导沟道大大提高了 SJ Fin-HJFET 的比导通电阻（从 1.091 mΩ cm2 降至 0.397 mΩ cm2，降低了 63.6%），并显著改善了相同击穿电压（3580 V）下的巴利加优越性系数（BFOM，从 11.75 GW/cm2 提高到 32.28 GW/cm2）。此外，还研究了不同的导带偏移（ΔEC）对 SJ Fin-HJFET 性能的影响。仿真结果表明，SJ Fin-HJFET 的导通电阻优势适用于很宽的 ΔEC 范围，表现出很强的适用性和稳定性。这些结果表明，SJ Fin-HJFET 具有创纪录的高性能和广阔的应用前景。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.