3D network-on-chip data acquisition system mapping based on reinforcement learning and improved attention mechanism

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-07-16 DOI:10.1016/j.mejo.2024.106323

Chuanpei Xu , Xiuli Shi , Hong Yang , Yang Wang

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引用次数: 0

Abstract

The three-dimensional Network-on-Chip (NoC) data acquisition system is designed to create a time-interleaved data acquisition system using NoC technology. In the design of NoC application systems, optimizing the mapping algorithm can effectively reduce network communication latency. Aiming at the mapping challenge of a large number of functional IP nodes in 3D NoC data acquisition system, the reinforcement learning and improved attention mechanism mapping algorithm (RA-Map) is proposed. The RA-Map mapping algorithm employs node function encoding and node position encoding to express the properties of an IP node in the task graph preprocessing. The local attention mechanism is used in the mapping network encoder, and the fusion of dynamic key node information is proposed in the decoder. The mapping result evaluation network achieves unsupervised training of the mapping network. These targeted improvements improve the quality of the mapping. Experimental results show that the RA-Map mapping algorithm can effectively model the IP core mapping. Compared with the DPSO algorithm and SA algorithm, the average communication cost of RA-Map mapping algorithm is reduced by 6.5 % and 8.5 %, respectively.

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基于强化学习和改进注意力机制的 3D 片上网络数据采集系统制图

三维片上网络（NoC）数据采集系统旨在利用 NoC 技术创建一个时间交错的数据采集系统。在 NoC 应用系统的设计中，优化映射算法可以有效降低网络通信延迟。针对三维 NoC 数据采集系统中大量功能 IP 节点的映射难题，提出了强化学习和改进注意力机制映射算法（RA-Map）。RA-Map 映射算法采用节点功能编码和节点位置编码来表达任务图预处理中 IP 节点的属性。在映射网络编码器中使用了局部关注机制，在解码器中提出了动态关键节点信息的融合。映射结果评估网络实现了映射网络的无监督训练。这些有针对性的改进提高了映射的质量。实验结果表明，RA-Map 映射算法能有效地建立 IP 核映射模型。与 DPSO 算法和 SA 算法相比，RA-Map 映射算法的平均通信成本分别降低了 6.5 % 和 8.5 %。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.