{"title":"A fully digital timing background calibration algorithm based on first-order auto-correlation for time-interleaved ADCs","authors":"","doi":"10.1016/j.mejo.2024.106330","DOIUrl":null,"url":null,"abstract":"<div><p>This paper presents a fully digital background calibration method for time-interleaved (TI) analog-to-digital converters (ADCs). The timing detector employs a timing detection method based on an enhanced autocorrelation function, combined with matrix operations, to improve the accuracy of timing mismatch acquisition. The algorithm makes full use of the autocorrelation functions of each channel and proposes a more precise method for obtaining autocorrelation derivatives. Furthermore, the algorithm features a simple structure, low computational complexity, and can support timing calibration for any number of channels without requiring additional channels. The algorithm was validated using an ADC + FPGA combined system, with a 8-channel TI-ADC manufactured in 28 nm technology and a sampling rate of 20 GS/s. Results demonstrate that compared to the uncalibrated state, the algorithm significantly improves the SNDR and SFDR from 27.98 dB and 30.76 dB to 39.38 dB and 42.13 dB, respectively when the inputs are near the Nyquist frequency.</p></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124000341","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a fully digital background calibration method for time-interleaved (TI) analog-to-digital converters (ADCs). The timing detector employs a timing detection method based on an enhanced autocorrelation function, combined with matrix operations, to improve the accuracy of timing mismatch acquisition. The algorithm makes full use of the autocorrelation functions of each channel and proposes a more precise method for obtaining autocorrelation derivatives. Furthermore, the algorithm features a simple structure, low computational complexity, and can support timing calibration for any number of channels without requiring additional channels. The algorithm was validated using an ADC + FPGA combined system, with a 8-channel TI-ADC manufactured in 28 nm technology and a sampling rate of 20 GS/s. Results demonstrate that compared to the uncalibrated state, the algorithm significantly improves the SNDR and SFDR from 27.98 dB and 30.76 dB to 39.38 dB and 42.13 dB, respectively when the inputs are near the Nyquist frequency.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.