Power-efficient 12-bit 800 MS/s voltage-time hybrid domain ADC with split TDC in 28 nm CMOS

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Yun Li, Yi Shen, Yue Cao, Mengtong Wu, Li Dang, Shubin Liu, Ruixue Ding, Zhangming Zhu
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引用次数: 0

Abstract

In this paper, an 800 MS/s 12bit voltage-time hybrid domain ADC is presented. A four-channel split time-to-digital converter (TDC) is proposed in the first-stage sub-TDC, effectively reducing the impact of skew error. A configurable time amplifier (TA) is proposed to pre-configure the discharge voltage, optimizing the conversation rate and power consumption. The hybrid domain ADC verified in a 28-nm CMOS process with a core area of 0.033 mm2, which achieves 65.66 dB SNDR and 72.16 dB SFDR while consuming 7.93 mW from a single 0.9-V supply, resulting in Walden figure-of-merit (FoM) values of 6.34 fJ/conversion-step.

采用 28 纳米 CMOS 的高能效 12 位 800 MS/s 电压-时间混合域 ADC,带分路 TDC
本文介绍了一种 800 MS/s 12 位电压-时间混合域 ADC。在第一级子 TDC 中提出了一个四通道分离式时间数字转换器 (TDC),有效地减少了偏斜误差的影响。此外,还提出了一种可配置的时间放大器(TA)来预配置放电电压,从而优化了对话速率和功耗。混合域 ADC 采用 28 纳米 CMOS 工艺验证,核心面积为 0.033 mm2,实现了 65.66 dB SNDR 和 72.16 dB SFDR,而 0.9 V 单电源功耗为 7.93 mW,沃顿功绩值 (FoM) 为 6.34 fJ/转换步。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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