Shih-Hsiang (Shane) Lin, Marko Simicic, Nicolas Pantano
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引用次数: 0
Abstract
2.5D/3D technologies require designers to reduce electrostatic discharge (ESD) protection of the internal I/O interfaces. To avoid over-design of ESD protection, designers require a more fundamental understanding of the ESD events that occur at this level. Here we present insights, practical guidelines and research directions for circuit designers and suppliers of bonding tools.
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