A 0.5-8GHz Reconfigurable CMOS RF Receiver Front-End for CR and DPA Applications

IF 4 2区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2024-07-05 DOI:10.1109/TCSII.2024.3423839

Hui Nie;Tiancheng Yu;Jiangbo Chen;Jiabing Liu;Dongdong Liu;Xiaopeng Yu;Qun Jane Gu;Zhiwei Xu

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Abstract

This brief presents a 0.5-8 GHz CMOS RF receiver front-end (RxFE) tailored for cognitive radio (CR) and digital phased array (DPA) applications. The RxFE comprises a wideband mixer with noise suppression capability, along with a reconfigurable band-pass filter (BPF) designed to adapt to different intermediate frequencies (IFs) and signal bandwidths (SBWs). Additionally, the BPF functions as a programmable gain amplifier (PGA), enabling support for a large dynamic range with fine gain adjustment. The BPF offers a programmable center frequency (CF) range from 250 MHz to 450 MHz with a 5 MHz step, as well as support for tunable passbands from 60 MHz to 240 MHz with 5 MHz resolution. The RF RxFE provides a gain control range of 15-to-55 dB with a 0.5 dB gain step. Fabricated in a standard 55 nm CMOS process, the prototype occupies an area of

$2.29~mm^{2}$

including pads, consuming 75.6mW power without an on-chip high-IF BPF and 226.8mW with it at 2.3GHz LO input. Measurement results indicate that the prototype achieves approximately 10 ns gain switching time and 350 ns frequency hopping time when driven by an external fast-switching local oscillation (LO) signal, attributed to its high IF architecture. The receiver demonstrates exceptional agility, meeting the stringent requirements of CR and DPA applications.

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用于 CR 和 DPA 应用的 0.5-8GHz 可重构 CMOS 射频接收器前端

本简介介绍了专为认知无线电（CR）和数字相控阵（DPA）应用定制的 0.5-8 GHz CMOS 射频接收器前端（RxFE）。RxFE 包括一个具有噪声抑制功能的宽带混频器，以及一个可重新配置的带通滤波器 (BPF)，旨在适应不同的中频 (IF) 和信号带宽 (SBW)。此外，BPF 还可用作可编程增益放大器 (PGA)，支持大动态范围微调增益。BPF 的可编程中心频率 (CF) 范围为 250 MHz 至 450 MHz（步长为 5 MHz），并支持 60 MHz 至 240 MHz（分辨率为 5 MHz）的可调通带。射频 RxFE 的增益控制范围为 15 至 55 dB，增益步长为 0.5 dB。原型采用标准 55 nm CMOS 工艺制造，包括焊盘在内的占地面积为 2.29~mm^{2}$，在 2.3GHz LO 输入时，不使用片内高内频 BPF 的功耗为 75.6mW，使用片内高内频 BPF 的功耗为 226.8mW。测量结果表明，由于采用了高中频架构，该原型机在外部快速切换本振（LO）信号驱动下可实现约 10 ns 的增益切换时间和 350 ns 的跳频时间。该接收器表现出卓越的灵活性，满足了 CR 和 DPA 应用的严格要求。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Circuits and Systems II: Express Briefs 工程技术-工程：电子与电气

CiteScore

7.90

自引率

20.50%

发文量

883

审稿时长

3.0 months

期刊介绍： TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: Circuits: Analog, Digital and Mixed Signal Circuits and Systems Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic Circuits and Systems, Power Electronics and Systems Software for Analog-and-Logic Circuits and Systems Control aspects of Circuits and Systems.