Measurement of cryoelectronics heating using a local quantum dot thermometer in silicon

Chip Pub Date : 2024-05-27 DOI:10.1016/j.chip.2024.100097
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引用次数: 0

Abstract

Silicon technology offers the enticing opportunity for monolithic integration of quantum and classical electronic circuits. However, the power consumption levels of classical electronics may compromise the local chip temperature and hence affect the fidelity of qubit operations. In the current work, a quantum-dot-based thermometer embedded in an industry-standard silicon field-effect transistor (FET) was adopted to assess the local temperature increase produced by an active FET placed in close proximity. The impact of both static and dynamic operation regimes was thoroughly investigated. When the FET was operated statically, a power budget of 45 nW at 100-nm separation was found, whereas at 216 μm, the power budget was raised to 150 μW. Negligible temperature increase for the switch frequencies tested up to 10 MHz was observed when operating dynamically. The current work introduced a method to accurately map out the available power budget at a distance from a solid-state quantum processor, and indicated the possible conditions under which cryoelectronics circuits may allow the operation of hybrid quantum–classical systems.

利用硅局部量子点温度计测量低温电子加热
硅技术为量子和经典电子电路的单片集成提供了诱人的机会。然而,经典电子器件的功耗水平可能会影响芯片的局部温度,进而影响量子比特运行的保真度。在这里,我们利用嵌入工业标准硅场效应晶体管(FET)中的量子点温度计来评估近距离放置有源 FET 所产生的局部温度升高。我们研究了静态和动态工作状态的影响。当场效应晶体管静态工作时,我们发现在 100 nm 间隔内的功率预算为 45 nW,而在 216 μm 间隔内,功率预算上升到 150 μW。在动态运行时,我们观察到在高达 10 MHz 的测试开关频率下,温度上升可以忽略不计。我们的工作描述了一种方法,可精确绘制出距离固态量子处理器一定距离的可用功率预算,并指出在哪些条件下低温电子电路可允许混合量子-经典系统运行。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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CiteScore
2.80
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