A high-speed and power efficient CMOS dynamic comparator for data converter circuits

Abstract

Complementary metal oxide semiconductor (CMOS) comparators play a pivotal role in analog and mixed-signal circuits, finding diverse applications across electronic systems. In data converter circuits, the significance of high-speed, low-power comparators is pronounced. They ensure swift and precise signal comparisons, minimizing energy usage for dependable analog-to-digital and digital-to-analog conversions. This paper introduces an advanced CMOS dynamic comparator, optimized for data converter circuits using a 45 nm CMOS process. The comparator integrates two novel designs tailored for operation at 0.8 and 1 V power supplies, functioning at 1 GHz. One design incorporates a cascode differential amplifier in the pre-amplifier stage, enhancing speed and sensitivity by augmenting gain, linearity, and output swing. This approach achieves a delay of 73.53 ps and consumes 9.95 μW at a 1 V supply voltage. The second design employs a simple charge pump in the pre-amplifier stage, further elevating speed and sensitivity through amplified voltage levels and enhanced slew rate, resulting in a 57.24 ps delay and 9.03 μW power consumption at 1 V. Simulations underscore the proposed comparator's superiority over conventional counterparts, showcasing significant enhancements in speed and power efficiency, all while preserving precision and dependability.