{"title":"LACT: Liveness-Aware Checkpointing to reduce checkpoint overheads in intermittent systems","authors":"Youngbin Kim, Yoojin Lim, Chaedeok Lim","doi":"10.1016/j.sysarc.2024.103213","DOIUrl":null,"url":null,"abstract":"<div><p>Intermittent computing supports execution of the systems experiencing frequent power failures, such as battery-less devices powered by energy-harvesting. In such systems, checkpoint and recovery is a commonly adopted technique, where volatile system states are regularly saved to Non-Volatile Memory (NVM), to preserve computing progress between power cycles. Since checkpoint involves a large number of NVM accesses, which is expensive in terms of both latency and energy, reducing its overhead has been a significant research challenge. In this paper, we present LACT (Liveness-Aware CheckpoinTing), a compiler optimization technique to minimize checkpoint overhead in intermittent systems. At the time of checkpoint execution, there exist <em>dead</em> values in general, which will not be used or overwritten in the future. LACT examines such liveness information, especially in arrays, based on compile-time analysis and excludes the dead values from the checkpoint to reduce required checkpoint data, which is a previously unexplored optimization opportunity. Our evaluation shows that LACT can reduce 46.4% of required checkpoint data without any runtime support, leading to reduction of 31.5% in execution time and a 5.2% decrease in power consumption on average. Our experiments in real energy-harvesting environment demonstrates that such improvement translates to a 31.6% improvement in end-to-end execution time.</p></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"153 ","pages":"Article 103213"},"PeriodicalIF":3.7000,"publicationDate":"2024-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Systems Architecture","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1383762124001504","RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
Intermittent computing supports execution of the systems experiencing frequent power failures, such as battery-less devices powered by energy-harvesting. In such systems, checkpoint and recovery is a commonly adopted technique, where volatile system states are regularly saved to Non-Volatile Memory (NVM), to preserve computing progress between power cycles. Since checkpoint involves a large number of NVM accesses, which is expensive in terms of both latency and energy, reducing its overhead has been a significant research challenge. In this paper, we present LACT (Liveness-Aware CheckpoinTing), a compiler optimization technique to minimize checkpoint overhead in intermittent systems. At the time of checkpoint execution, there exist dead values in general, which will not be used or overwritten in the future. LACT examines such liveness information, especially in arrays, based on compile-time analysis and excludes the dead values from the checkpoint to reduce required checkpoint data, which is a previously unexplored optimization opportunity. Our evaluation shows that LACT can reduce 46.4% of required checkpoint data without any runtime support, leading to reduction of 31.5% in execution time and a 5.2% decrease in power consumption on average. Our experiments in real energy-harvesting environment demonstrates that such improvement translates to a 31.6% improvement in end-to-end execution time.
期刊介绍:
The Journal of Systems Architecture: Embedded Software Design (JSA) is a journal covering all design and architectural aspects related to embedded systems and software. It ranges from the microarchitecture level via the system software level up to the application-specific architecture level. Aspects such as real-time systems, operating systems, FPGA programming, programming languages, communications (limited to analysis and the software stack), mobile systems, parallel and distributed architectures as well as additional subjects in the computer and system architecture area will fall within the scope of this journal. Technology will not be a main focus, but its use and relevance to particular designs will be. Case studies are welcome but must contribute more than just a design for a particular piece of software.
Design automation of such systems including methodologies, techniques and tools for their design as well as novel designs of software components fall within the scope of this journal. Novel applications that use embedded systems are also central in this journal. While hardware is not a part of this journal hardware/software co-design methods that consider interplay between software and hardware components with and emphasis on software are also relevant here.