Aliaa Mohamed Salem , Ahmed Wahba , Hesham F.A. Hamed , Ahmed Reda Mohamed
{"title":"A pseudo resistor with temperature self-adaptive scheme","authors":"Aliaa Mohamed Salem , Ahmed Wahba , Hesham F.A. Hamed , Ahmed Reda Mohamed","doi":"10.1016/j.vlsi.2024.102229","DOIUrl":null,"url":null,"abstract":"<div><p>A temperature self-adaptive ultra-high-resistance pseudo-resistor (PR) circuit is proposed for a wide range of biomedical applications. It acts as a relatively constant resistor over a wide temperature range (−40 °C–85 °C) due to its potential to compensate for the impact of the temperature-induced current. Hence, the performance of many biomedical analog intellectual property (IP) circuits can be effectively improved with temperature variations. The proposed circuit consists of a gate-voltage-controlled pseudo-resistor and a proportional-to- absolute-temperature (PTAT) circuit. Besides, its analysis and proof of concept with the self-adaptive scheme are presented. The circuit is designed in standard 0.18 μm CMOS technology and occupies a silicon area of 18.5 × 43.7 μm<sup>2</sup>. It consumes 12 nW with a single power supply of 1.8 V. The post-layout simulation results demonstrate that the proposed pseudo-resistor could adequately improve the temperature-induced resistance variation by up to 18X while consuming ultra-low power and providing relatively high-temperature independence compared to the prior art.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024000932","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
A temperature self-adaptive ultra-high-resistance pseudo-resistor (PR) circuit is proposed for a wide range of biomedical applications. It acts as a relatively constant resistor over a wide temperature range (−40 °C–85 °C) due to its potential to compensate for the impact of the temperature-induced current. Hence, the performance of many biomedical analog intellectual property (IP) circuits can be effectively improved with temperature variations. The proposed circuit consists of a gate-voltage-controlled pseudo-resistor and a proportional-to- absolute-temperature (PTAT) circuit. Besides, its analysis and proof of concept with the self-adaptive scheme are presented. The circuit is designed in standard 0.18 μm CMOS technology and occupies a silicon area of 18.5 × 43.7 μm2. It consumes 12 nW with a single power supply of 1.8 V. The post-layout simulation results demonstrate that the proposed pseudo-resistor could adequately improve the temperature-induced resistance variation by up to 18X while consuming ultra-low power and providing relatively high-temperature independence compared to the prior art.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.