CRPIM: An efficient compute-reuse scheme for ReRAM-based Processing-in-Memory DNN accelerators

IF 3.7 2区 计算机科学 Q1 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Shihao Hong , Yeh-Ching Chung
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引用次数: 0

Abstract

Resistive random access memory (ReRAM) is a promising technology for AI Processing-in-Memory (PIM) hardware because of its compatibility with CMOS, small footprint, and ability to complete matrix–vector multiplication workloads inside the memory device itself. However, redundant computations are brought on by duplicate weights and inputs when an MVM has to be split into smaller-granularity sequential sub-works in the real world. Recent studies have proposed repetition-pruning to address this issue, but the buffer allocation strategy for enhancing buffer device utilization remains understudied. In preliminary experiments observing input patterns of neural layers with different datasets, the similarity of repetition allows us to transfer the buffer allocation strategy obtained from a small dataset to the computation with a large dataset. Hence, this paper proposes a practical compute-reuse mechanism for ReRAM-based PIM, called CRPIM, which replaces repetitive computations with buffering and reading. Moreover, the subsequent buffer allocation problem is resolved at both inter-layer and intra-layer levels. Our experimental results demonstrate that CRPIM significantly reduces ReRAM cells and execution time while maintaining adequate buffer and energy overhead.

CRPIM:基于 ReRAM 的 "内存处理 DNN "加速器的高效计算重复使用方案
电阻式随机存取存储器(ReRAM)与 CMOS 兼容、占地面积小,而且能够在存储器件内部完成矩阵-矢量乘法工作负载,因此是人工智能内存处理(PIM)硬件的一项前景广阔的技术。然而,在现实世界中,当一个 MVM 需要拆分成粒度更小的连续子工程时,重复权重和输入会带来冗余计算。最近的研究提出了重复剪枝法来解决这一问题,但提高缓冲设备利用率的缓冲分配策略仍未得到充分研究。在观察不同数据集的神经层输入模式的初步实验中,重复的相似性使我们能够将从小数据集获得的缓冲区分配策略转移到大数据集的计算中。因此,本文为基于 ReRAM 的 PIM 提出了一种实用的计算重复使用机制,称为 CRPIM,它以缓冲和读取取代了重复计算。此外,还在层间和层内两个层面解决了后续缓冲区分配问题。我们的实验结果表明,CRPIM 显著减少了 ReRAM 单元和执行时间,同时保持了足够的缓冲区和能源开销。
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来源期刊
Journal of Systems Architecture
Journal of Systems Architecture 工程技术-计算机:硬件
CiteScore
8.70
自引率
15.60%
发文量
226
审稿时长
46 days
期刊介绍: The Journal of Systems Architecture: Embedded Software Design (JSA) is a journal covering all design and architectural aspects related to embedded systems and software. It ranges from the microarchitecture level via the system software level up to the application-specific architecture level. Aspects such as real-time systems, operating systems, FPGA programming, programming languages, communications (limited to analysis and the software stack), mobile systems, parallel and distributed architectures as well as additional subjects in the computer and system architecture area will fall within the scope of this journal. Technology will not be a main focus, but its use and relevance to particular designs will be. Case studies are welcome but must contribute more than just a design for a particular piece of software. Design automation of such systems including methodologies, techniques and tools for their design as well as novel designs of software components fall within the scope of this journal. Novel applications that use embedded systems are also central in this journal. While hardware is not a part of this journal hardware/software co-design methods that consider interplay between software and hardware components with and emphasis on software are also relevant here.
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