A 8.83 ppm/°C temperature coefficient, 75 dB PSRR subthreshold CMOS voltage reference with piecewise curvature compensation

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Tiedong Cheng, Hao Rao, Jinxiang Wei
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引用次数: 0

Abstract

A subthreshold CMOS voltage reference (CVR) with low temperature coefficient (TC) over a wide temperature range and low power is proposed in this paper. The proposed CVR utilizes the ΔVGS of different-threshold and same-threshold nMOS pairs to generate complementary-to-absolute-temperature (CTAT) and proportional-to-absolute-temperature (PTAT) voltages, respectively. To compensate for the low-temperature and high-temperature segments of the temperature characteristic curve, the nonlinear compensation currents generated by the exponential-like relationship between the drain current and the gate-source voltage of two MOSFETs work in the subthreshold region is used. Based on a 0.18-μm CMOS process, post-layout simulation results show that the proposed CVR achieves an average output voltage of 263 mV. The power supply ripple rejection (PSRR) is −75 dB at 10 Hz and the line sensitivity (LS) is 0.0069 %/V when the supply voltage varies from 0.8 V to 2.5 V. The average TC is 8.83 ppm/°C for a wide temperature range of −40 °C–120 °C, and the minimum TC is only 3.65 ppm/°C.

温度系数为 8.83 ppm/°C、PSRR 为 75 dB、具有片式曲率补偿功能的亚阈值 CMOS 电压基准
本文提出了一种在宽温度范围内具有低温度系数(TC)和低功耗的阈下 CMOS 电压基准(CVR)。所提出的 CVR 利用不同阈值和相同阈值 nMOS 对的ΔVGS,分别生成互补绝对温度电压 (CTAT) 和比例绝对温度电压 (PTAT)。为了对温度特性曲线的低温段和高温段进行补偿,使用了由工作在亚阈值区的两个 MOSFET 的漏极电流和栅源电压之间的指数关系所产生的非线性补偿电流。基于 0.18μm CMOS 工艺的布局后仿真结果表明,所提出的 CVR 实现了 263 mV 的平均输出电压。当电源电压在 0.8 V 至 2.5 V 之间变化时,10 Hz 时的电源纹波抑制 (PSRR) 为 -75 dB,线路灵敏度 (LS) 为 0.0069 %/V。在 -40 °C-120 °C 宽温度范围内,平均 TC 为 8.83 ppm/°C,最小 TC 仅为 3.65 ppm/°C。
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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