A comprehensive review: ultra-low power all-digital phase-locked loop RF transceivers for biomedical monitoring applications

IF 1.2 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Abdul Khaliq, Jahariah Sampe, Fazida Hanim Hashim, Huda Abdullah, Noor Hidayah Mohd Yunus, Muhammad Asim Noon
{"title":"A comprehensive review: ultra-low power all-digital phase-locked loop RF transceivers for biomedical monitoring applications","authors":"Abdul Khaliq,&nbsp;Jahariah Sampe,&nbsp;Fazida Hanim Hashim,&nbsp;Huda Abdullah,&nbsp;Noor Hidayah Mohd Yunus,&nbsp;Muhammad Asim Noon","doi":"10.1007/s10470-024-02272-1","DOIUrl":null,"url":null,"abstract":"<div><p>This paper comprehensively reviews the evolution and latest advancement of ultra-low All-Digital Phase Locked Loop (ADPLL) RF transceivers designed specifically for biomedical monitoring devices. With CMOS technology, these transceivers provide efficiency and simplicity, which are essential in the medical industry. As the size and power needs of these devices decrease due to CMOS scaling, they become more suitable for small and low-energy applications. In addition, this review also provides an insight into the ADPLL applications, Digital Controlled Oscillator (DCO), and Phase Frequency Detectors. The review highlights notable differences in performance between time-to-digital converters (TDC) and TDC-less designs. TDC-less design, like Digital Phase Frequency Detectors (DPFD), offers improvements in phase noise, small size, fast phase and frequency acquisition, and power efficiency at the expense of resolution. Comparing LC-DCO and ring-DCO revealed that at high operating frequencies, the ring-DCO consumes more power but has a simpler design and a smaller circuit area than LC-DCO. Future research should focus on enhancing the performance of the ADPLL RF transceiver for biomedical devices, specifically by using a low-voltage supply and implementing DPFD to achieve low power consumption, compact design and fast locking. The significant challenges remain in maintaining low power consumption at higher frequencies with Ring-DCO design. Using the Verilog HDL for ADPLL design and implementation provides modularity, simulation, synthesis, and flexibility, which makes it an excellent alternative to designing RF transceivers in biomedical applications which are efficient and reliable.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"119 3","pages":"391 - 415"},"PeriodicalIF":1.2000,"publicationDate":"2024-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-024-02272-1","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

Abstract

This paper comprehensively reviews the evolution and latest advancement of ultra-low All-Digital Phase Locked Loop (ADPLL) RF transceivers designed specifically for biomedical monitoring devices. With CMOS technology, these transceivers provide efficiency and simplicity, which are essential in the medical industry. As the size and power needs of these devices decrease due to CMOS scaling, they become more suitable for small and low-energy applications. In addition, this review also provides an insight into the ADPLL applications, Digital Controlled Oscillator (DCO), and Phase Frequency Detectors. The review highlights notable differences in performance between time-to-digital converters (TDC) and TDC-less designs. TDC-less design, like Digital Phase Frequency Detectors (DPFD), offers improvements in phase noise, small size, fast phase and frequency acquisition, and power efficiency at the expense of resolution. Comparing LC-DCO and ring-DCO revealed that at high operating frequencies, the ring-DCO consumes more power but has a simpler design and a smaller circuit area than LC-DCO. Future research should focus on enhancing the performance of the ADPLL RF transceiver for biomedical devices, specifically by using a low-voltage supply and implementing DPFD to achieve low power consumption, compact design and fast locking. The significant challenges remain in maintaining low power consumption at higher frequencies with Ring-DCO design. Using the Verilog HDL for ADPLL design and implementation provides modularity, simulation, synthesis, and flexibility, which makes it an excellent alternative to designing RF transceivers in biomedical applications which are efficient and reliable.

Abstract Image

Abstract Image

综述:用于生物医学监测应用的超低功耗全数字锁相环射频收发器
本文全面回顾了专为生物医学监测设备设计的超低全数字锁相环(ADPLL)射频收发器的演变和最新进展。这些收发器采用 CMOS 技术,具有医疗行业所必需的高效性和简易性。由于 CMOS 的扩展,这些设备的尺寸和功耗都有所减小,因此更适合小型和低能耗应用。此外,本综述还深入介绍了 ADPLL 应用、数字控制振荡器 (DCO) 和相位频率检测器。本综述强调了时间数字转换器(TDC)和无 TDC 设计在性能上的显著差异。无 TDC 设计,如数字相位频率检测器 (DPFD),在相位噪声、小尺寸、快速相位和频率采集以及功率效率方面都有所改进,但牺牲了分辨率。对 LC-DCO 和环形-DCO 进行比较后发现,在高工作频率下,环形-DCO 比 LC-DCO 消耗更多功率,但设计更简单,电路面积更小。未来的研究应侧重于提高用于生物医学设备的 ADPLL 射频收发器的性能,特别是通过使用低压电源和实施 DPFD 来实现低功耗、紧凑设计和快速锁定。在更高频率下保持低功耗仍然是 Ring-DCO 设计的重大挑战。使用 Verilog HDL 进行 ADPLL 设计和实现具有模块化、仿真、综合和灵活性等特点,是设计生物医学应用中高效可靠的射频收发器的绝佳选择。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信