Silicon cross-coupled gated tunneling diodes

Chip Pub Date : 2024-06-01 DOI:10.1016/j.chip.2024.100094
Zhenyun Tang , Zhe Wang , Zhigang Song , Wanhua Zheng
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引用次数: 0

Abstract

Tunneling-based static random-access memory (SRAM) devices have been developed to fulfill the demands of high density and low power, and the performance of SRAMs has also been greatly promoted. However, for a long time, there has not been a silicon based tunneling device with both high peak valley current ratio (PVCR) and practicality, which remains a gap to be filled. Based on the existing work, the current manuscript proposed the concept of a new silicon-based tunneling device, i.e., the silicon cross-coupled gated tunneling diode (Si XTD), which is quite simple in structure and almost completely compatible with mainstream technology. With technology computer aided design (TCAD) simulations, it has been validated that this type of device not only exhibits significant negative-differential-resistance (NDR) behavior with PVCRs up to 106, but also possesses reasonable process margins. Moreover, SPICE simulation showed the great potential of such devices to achieve ultralow-power tunneling-based SRAMs with standby power down to 10−12 W.

硅交叉耦合门控隧道二极管
为了满足高密度和低功耗的需求,基于隧道技术的静态随机存取存储器(SRAM)器件应运而生,SRAM 的性能也得到了大幅提升。然而,长期以来,一直没有一种峰谷电流比(PVCR)和实用性都很高的硅基隧道器件,这仍然是一个有待填补的空白。在已有工作的基础上,本手稿提出了一种新型硅基隧道器件的概念,即硅交叉耦合栅隧穿二极管(Si XTD),其结构相当简单,几乎完全兼容主流技术。通过技术计算机辅助设计(TCAD)模拟验证,这种器件不仅具有显著的负差分电阻(NDR)特性,PVCR 可高达 106,而且具有合理的工艺裕度。此外,SPICE 仿真还显示了这种器件在实现待机功耗低至 10-12 W 的超低功耗隧道式 SRAM 方面的巨大潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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CiteScore
2.80
自引率
0.00%
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