A 200 - 325 GHz Gain-Boosted J-Band Low-Noise Amplifier in a 130 nm SiGe BiCMOS Technology

Manuel Koch, Sascha Breun, Robert Weigel
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Abstract

This paper presents a wideband low-noise amplifier covering the complete J-Band up to the band edge of 325 GHz. A peak gain of 17.4 dB is achieved by a four-stage cascode-based prototype using inductive and capacitive gain boosting techniques. It is manufactured in a 130 nm SiGe BiCMOS technology with $f_{t} / f_{\max }$ of 350 GHz/450 GHz, respectively. Zero-Ohm lines are applied to bias the amplifier and low-loss Marchand baluns facilitate single-ended measurements. At both edges of the measured frequency range, a gain of at least 17 dB is shown, while a minimum gain of 12.1 dB is reported. Simulations predict a noise figure of 13.1 dB to 17.2 dB and an input-referred compression point better than −23 dBm, making the amplifier suitable for sub-terahertz radar and wireless communication within IEEE 802.15.3d frequency bands. A core chip area of $250 \times 230 \mu\mathrm{~m}^{2}$ and a DC power of 162 mW are required.
采用 130 纳米 SiGe BiCMOS 技术的 200 - 325 GHz 增益增强型 J 波段低噪声放大器
本文介绍了一种宽带低噪声放大器,覆盖整个 J 波段直至 325 GHz 波段边缘。基于四级级联的原型采用电感和电容增益提升技术,实现了 17.4 dB 的峰值增益。它采用 130 nm SiGe BiCMOS 技术制造,具有 $f_{t} / f_{\max }。/ f_{\max }$ 分别为 350 GHz/450 GHz。零欧姆线用于放大器的偏置,低损耗马钱德平衡器有助于单端测量。在测量频率范围的两个边缘,均显示出至少 17 dB 的增益,而最小增益为 12.1 dB。模拟预测噪声系数为 13.1 dB 至 17.2 dB,输入参考压缩点优于 -23 dBm,使放大器适用于 IEEE 802.15.3d 频段内的亚太赫兹雷达和无线通信。核心芯片面积为 250 美元乘以 230 \mu\mathrm{~m}^{2}$ ,直流电功率为 162 mW。
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