CMOS LNA and VGA for 5G NR Using Gain-Linearity-Boosting and Body Floating Techniques

Abstract

We report a 9.5-mW 21.3-27.9-GHz CMOS low-noise amplifier (LNA) with auxiliary-gain-linearity-enhancement (AGLE) stage. It adopts body-floating and coupled-transmission-line (CTL)-based gain-boosting techniques. The LNA constitutes a common-source (CS) input stage, followed by CS gain and output stages. The bias current of the output stage is reused by the gain stage for low power dissipation ($\mathrm{P}_{\mathrm{dc}}$). The CTL in conjunction with a coupling capacitance $(C_{c t})$ contributes an in-phase gain at the output of the input stage. Over 21.3-27.9 GHz, 0.75-4.28 dB boosting in S21 and 0.25-0.46 dB reduction in noise figure (NF) are achieved. Moreover, based on the LNA topology, we report a 13.2mW 21-28-GHz CMOS variable-gain amplifier (VGA). Analog switch transistor M4 is in parallel with the output stage to tune its overdrive and drain-source voltage ($V_{D S}$) for fine tuning of S21. Digital switch transistor M5 is in parallel with the gain stage to control its $A C$ VDS for coarse tuning of S21. The VGA achieves S21 of 19.5 ± 1.5 dB for 21-28 GHz (i.e., 3-dB bandwidth $\mathrm{f}_{3 \mathrm{~dB}}=7 \mathrm{GHz}$), S21 tuning range of 35.6 dB (21 ~ −14.6 dB), minimum NF of 1.99 dB at 24 GHz and average $\mathrm{NF}(\mathrm{NF}_{\mathrm{avg}})$ of 2.19 dB for 21-28 GHz, and figure-of-merit (FOM2) of $61 \mathrm{~nm} \cdot \mathrm{GHz}^{2 / 3} / \mathrm{mW}^{1 / 3}$. The $\mathrm{NF}_{\text {avg}}$ and FOM2 are one of the best results ever reported for VGAs/LNAs with $f_{3 \mathrm{~dB}}$ greater than 5 GHz and $P_{\mathrm{dc}}$ lower than 15 mW.