A fault-tolerant and energy-efficient design of RAM cell and PIM structure in quantum technology

Abstract

In this paper, a RAM cell in ternary QCA is proposed. Moreover, a 2×1 memory array and a TPIM (ternary processing in memory) structure are designed using the proposed ternary RAM cell. The evaluation of the design parameters shows that the proposed ternary SRAM and PIM structures are efficient in terms of cost, area, and fault tolerance while the volume of information-carrying is high because of the ternary structure. The manufacturing defects in the chemical manufacturing process of QCA circuits are possible. One of these defects is cell omission which has not yet been investigated for QCA-based SRAM in ternary structure. According to the results, by migrating from binary to ternary QCA, the fault tolerance can be increased without increasing the occupied area. Then, the fault tolerance of ternary RAM cells is calculated and compared with that of binary structures. The primary aims of this study are to improve fault tolerance and optimization of design parameters, which are achieved according to the results.