Jiayu Huang;Zikai Zhu;Peng Su;Dejiu Chen;Li-Rong Zheng;Zhuo Zou
{"title":"A Reconfigurable Near-Sensor Processor for Anomaly Detection in Limb Prostheses","authors":"Jiayu Huang;Zikai Zhu;Peng Su;Dejiu Chen;Li-Rong Zheng;Zhuo Zou","doi":"10.1109/TBCAS.2024.3370571","DOIUrl":null,"url":null,"abstract":"This paper presents a reconfigurable near-sensor anomaly detection processor to real-time monitor the potential anomalous behaviors of amputees with limb prostheses. The processor is low-power, low-latency, and suitable for equipment on the prostheses and comprises a reconfigurable Variational Autoencoder (VAE), a scalable Self-Organizing Map (SOM) Array, and a window-size-adjustable Markov Chain, which can implement an integrated miniaturized anomaly detection system. With the reconfigurable VAE, the proposed processor can support up to 64 sensor sampling channels programmable by global configuration, which can meet the anomaly detection requirements in different scenarios. A scalable SOM array allows for the selection of different sizes based on the complexity of the data. Unlike traditional time accumulation-based anomaly detection methods, the Markov Chain is utilized to detect time-series-based anomalous data. The processor is designed and fabricated in a UMC 40-nm LP technology with a core area of 1.49 mm\n<inline-formula><tex-math>${}^{2}$</tex-math></inline-formula>\n and a power consumption of 1.81 mW. It achieves real-time detection performance with 0.933 average F1 Score for the FSP dataset within 24.22 \n<inline-formula><tex-math>$\\mu$</tex-math></inline-formula>\ns, and 0.956 average F1 Score for the SFDLA-12 dataset within 30.48 \n<inline-formula><tex-math>$\\mu$</tex-math></inline-formula>\ns. The energy dissipation of detection for each input feature is 43.84 nJ with the FSP dataset, and 55.17 nJ with the SFDLA-12 dataset. Compared with ARM Cortex-M4 and ARM Cortex-M33 microcontrollers, the processor achieves energy and area efficiency improvements ranging from 257\n<inline-formula><tex-math>$\\boldsymbol{\\times}$</tex-math></inline-formula>\n, 193\n<inline-formula><tex-math>$\\boldsymbol{\\times}$</tex-math></inline-formula>\n and 11\n<inline-formula><tex-math>$\\boldsymbol{\\times}$</tex-math></inline-formula>\n, 8\n<inline-formula><tex-math>$\\boldsymbol{\\times}$</tex-math></inline-formula>\n, respectively.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 5","pages":"976-989"},"PeriodicalIF":0.0000,"publicationDate":"2024-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE transactions on biomedical circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10453270/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a reconfigurable near-sensor anomaly detection processor to real-time monitor the potential anomalous behaviors of amputees with limb prostheses. The processor is low-power, low-latency, and suitable for equipment on the prostheses and comprises a reconfigurable Variational Autoencoder (VAE), a scalable Self-Organizing Map (SOM) Array, and a window-size-adjustable Markov Chain, which can implement an integrated miniaturized anomaly detection system. With the reconfigurable VAE, the proposed processor can support up to 64 sensor sampling channels programmable by global configuration, which can meet the anomaly detection requirements in different scenarios. A scalable SOM array allows for the selection of different sizes based on the complexity of the data. Unlike traditional time accumulation-based anomaly detection methods, the Markov Chain is utilized to detect time-series-based anomalous data. The processor is designed and fabricated in a UMC 40-nm LP technology with a core area of 1.49 mm
${}^{2}$
and a power consumption of 1.81 mW. It achieves real-time detection performance with 0.933 average F1 Score for the FSP dataset within 24.22
$\mu$
s, and 0.956 average F1 Score for the SFDLA-12 dataset within 30.48
$\mu$
s. The energy dissipation of detection for each input feature is 43.84 nJ with the FSP dataset, and 55.17 nJ with the SFDLA-12 dataset. Compared with ARM Cortex-M4 and ARM Cortex-M33 microcontrollers, the processor achieves energy and area efficiency improvements ranging from 257
$\boldsymbol{\times}$
, 193
$\boldsymbol{\times}$
and 11
$\boldsymbol{\times}$
, 8
$\boldsymbol{\times}$
, respectively.