Jiajia Wu;Abraham Akinin;Jonathan Somayajulu;Min S. Lee;Akshay Paul;Hongyu Lu;Yongjae Park;Seong-Jin Kim;Patrick P. Mercier;Gert Cauwenberghs
{"title":"A Low-Noise Low-Power 0.001Hz–1kHz Neural Recording System-on-Chip With Sample-Level Duty-Cycling","authors":"Jiajia Wu;Abraham Akinin;Jonathan Somayajulu;Min S. Lee;Akshay Paul;Hongyu Lu;Yongjae Park;Seong-Jin Kim;Patrick P. Mercier;Gert Cauwenberghs","doi":"10.1109/TBCAS.2024.3368068","DOIUrl":null,"url":null,"abstract":"Advances in brain-machine interfaces and wearable biomedical sensors for healthcare and human-computer interactions call for precision electrophysiology to resolve a variety of biopotential signals across the body that cover a wide range of frequencies, from the mHz-range electrogastrogram (EGG) to the kHz-range electroneurogram (ENG). Existing integrated wearable solutions for minimally invasive biopotential recordings are limited in detection range and accuracy due to trade-offs in bandwidth, noise, input impedance, and power consumption. This article presents a 16-channel wide-band ultra-low-noise neural recording system-on-chip (SoC) fabricated in 65nm CMOS for chronic use in mobile healthcare settings that spans a bandwidth of 0.001 Hz to 1 kHz through a featured sample-level duty-cycling (SLDC) mode. Each recording channel is implemented by a delta-sigma analog-to-digital converter (ADC) achieving 1.0 \n<inline-formula><tex-math>$\\mu$</tex-math></inline-formula>\n V\n<inline-formula><tex-math>${}_{rms}$</tex-math></inline-formula>\n input-referred noise over 1Hz–1kHz bandwidth with a Noise Efficiency Factor (NEF) of 2.93 in continuous operation mode. In SLDC mode, the power supply is duty-cycled while maintaining consistently low input-referred noise levels at ultra-low frequencies (1.1\n<inline-formula><tex-math>$\\mu$</tex-math></inline-formula>\nV\n<inline-formula><tex-math>${}_{rms}$</tex-math></inline-formula>\n over 0.001Hz–1Hz) and 435 M\n<inline-formula><tex-math>$\\Omega$</tex-math></inline-formula>\n input impedance. The functionalities of the proposed SoC are validated with two human electrophysiology applications: recording low-amplitude electroencephalogram (EEG) through electrodes fixated on the forehead to monitor brain waves, and ultra-slow-wave electrogastrogram (EGG) through electrodes fixated on the abdomen to monitor digestion.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2024-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE transactions on biomedical circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10444781/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Advances in brain-machine interfaces and wearable biomedical sensors for healthcare and human-computer interactions call for precision electrophysiology to resolve a variety of biopotential signals across the body that cover a wide range of frequencies, from the mHz-range electrogastrogram (EGG) to the kHz-range electroneurogram (ENG). Existing integrated wearable solutions for minimally invasive biopotential recordings are limited in detection range and accuracy due to trade-offs in bandwidth, noise, input impedance, and power consumption. This article presents a 16-channel wide-band ultra-low-noise neural recording system-on-chip (SoC) fabricated in 65nm CMOS for chronic use in mobile healthcare settings that spans a bandwidth of 0.001 Hz to 1 kHz through a featured sample-level duty-cycling (SLDC) mode. Each recording channel is implemented by a delta-sigma analog-to-digital converter (ADC) achieving 1.0
$\mu$
V
${}_{rms}$
input-referred noise over 1Hz–1kHz bandwidth with a Noise Efficiency Factor (NEF) of 2.93 in continuous operation mode. In SLDC mode, the power supply is duty-cycled while maintaining consistently low input-referred noise levels at ultra-low frequencies (1.1
$\mu$
V
${}_{rms}$
over 0.001Hz–1Hz) and 435 M
$\Omega$
input impedance. The functionalities of the proposed SoC are validated with two human electrophysiology applications: recording low-amplitude electroencephalogram (EEG) through electrodes fixated on the forehead to monitor brain waves, and ultra-slow-wave electrogastrogram (EGG) through electrodes fixated on the abdomen to monitor digestion.