Overcoming the relative bandwidth limitations of single VCO frequency synthesizers by implementing a novel PLL architecture

Abstract

Frequency-modulated continuous-wave radar systems profit from increasing the absolute bandwidths of the generated frequency chirps to improve range resolution. As the relative bandwidth of SiGe-voltage-controlled oscillators (VCOs) is limited to about 80%, increasing the center frequency fundamentally or via frequency multiplication is the most direct way to increase that absolute bandwidth. However, as some applications require penetration depth, which dramatically decreases with frequency, other solutions are necessary. Therefore, state-of-the-art concepts rely on the down-conversion of generated frequency chirps via two separately stabilized frequency sources. This article implements a novel architecture, offering relative bandwidths of >100% within a single phase-locked loop (PLL). Therefore, two VCOs at different center frequencies are fed into a down-conversion mixer, whose output is directly stabilized via that PLL with one loop filter generating both tuning voltages. Those circuit blocks can be summarized as one equivalent VCO, offering a higher relative bandwidth and a significantly more linear tuning curve. Thereby, a solution to limited relative bandwidths with high VCO gain variation of single VCO synthesizers is offered while substantially reducing the hardware and implementation effort compared to the state-of-the-art.