Design of an efficiency enhanced wideband Doherty power amplifier based on synthesising of a modified harmonic-control load modulation network

Abstract

A design of a broadband Doherty power amplifier (DPA) using a novel harmonic control network (HCN) is presented. The DPA structure focused on manipulating harmonic components using this new HCN to enhance the bandwidth of operation and power efficiency. The proposed HCN combines a third harmonic suppression network (THSN) with the second harmonic impedance inverter circuit (SHIIC). In the design, the second harmonic component of the main transistor and the peaking transistor are short-circuited by their associated SHIIC. Additionally, the carefully designed SHIIC and THSN circuit placed between the main and peaking transistors realise open circuit conditions at the third harmonic for both transistors at the saturation state and back-off regions. Side by side with the aid of the properly designed post-matching tuned network (PMTN), these harmonic loading conditions make both amplifiers to operate in continuous Class-F modes with enhanced-added efficiencies over wideband conditions. As a result, a succession of highly efficient DPA modes can be formed over a continuous frequency range in the full Doherty region, resulting in a reduced-size enhanced power efficiency wideband DPA. For verification, a wideband DPA operating from 1.1 to 1.8 GHz was designed and implemented using the proposed topology. The measured drain efficiency of the implemented DPA at 6-dB back-off is 52.5%–67.5%, while the saturated power across the specified bandwidth is 43–43.7 dBm. The fabricated DPA exhibits an average efficiency of 48.7%–59.4%, when supplied by a 40-MHz long-term evolution (LTE) signal with a 7.5-dB peak-to-average power ratio (PAPR). Performing digital pre-distortion (DPD) improves the adjacent channel power ratio (ACLR) from −25.8 dBc to −47.6 dBc.