A phase noise filter for RF oscillators

IF 1.2 4区工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Analog Integrated Circuits and Signal Processing Pub Date : 2024-02-05 DOI:10.1007/s10470-024-02249-0

Debdut Biswas

引用次数: 0

Abstract

In this work, a phase noise reduction architecture for standalone oscillators is presented. The oscillator phase is divided and a voltage is generated by a type-I phase detector, which is compared with an ideal voltage to change the phase of the oscillator. Analysis shows that the loop parameters aid in phase noise suppression. The design is done in CMOS 90 nm technology for a 1 GHz ring oscillator. Post-layout simulations show that phase noise suppression is about 13 dB at 100 MHz offset for a division ratio of 2.

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用于射频振荡器的相位噪声滤波器

摘要本文介绍了一种用于独立振荡器的相位噪声降低结构。振荡器相位被分割，并由 I 型相位检测器产生一个电压，将其与理想电压进行比较，从而改变振荡器的相位。分析表明，环路参数有助于抑制相位噪声。该设计采用 CMOS 90 纳米技术，适用于 1 GHz 的环形振荡器。布局后仿真显示，在分频比为 2 的情况下，100 MHz 偏移时的相位噪声抑制约为 13 dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Analog Integrated Circuits and Signal Processing 工程技术-工程：电子与电气

CiteScore

0.30

自引率

7.10%

发文量

141

审稿时长

7.3 months

期刊介绍： Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.