High-efficiency CMOS charge pump for ultra-low power RF energy harvesting applications

IF 2.2 3区工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Integration-The Vlsi Journal Pub Date : 2024-01-27 DOI:10.1016/j.vlsi.2024.102161

Ashik C. Jayamon, Ankur Mukherjee, Sai Chandra Teja R., Ashudeb Dutta

{"title":"High-efficiency CMOS charge pump for ultra-low power RF energy harvesting applications","authors":"Ashik C. Jayamon, Ankur Mukherjee, Sai Chandra Teja R., Ashudeb Dutta","doi":"10.1016/j.vlsi.2024.102161","DOIUrl":null,"url":null,"abstract":"<div><p><span>This paper explicates the design and implementation of a switch capacitor DC–DC converter system for Radio Frequency (RF) energy harvesting applications for an input voltage in the sub-150 mV range, using 180-nm CMOS triple-well BCD technology. The proposed system incorporates a charge pump architecture that employs an improvised Dynamic Gate Biasing (DGB), Forward and Reverse Body Bias technique (FRBB), along with a time axis symmetrical clocking scheme implemented using an advanced bootstrapped CMOS driver to enhance the overall drive capability of the system at low input voltages. Post-layout extracted simulations demonstrate that the proposed system achieves higher overall efficiency, delivering a peak </span>Power Conversion Efficiency (PCE) of 85.8% at 125 mV input voltage, outperforming other state-of-the-art architectures in similar voltage ranges. Moreover, the proposed system exhibits reliable operation even at input voltages as low as 85 mV, while maintaining good overall efficiency.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-01-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024000245","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}

引用次数: 0

Abstract

This paper explicates the design and implementation of a switch capacitor DC–DC converter system for Radio Frequency (RF) energy harvesting applications for an input voltage in the sub-150 mV range, using 180-nm CMOS triple-well BCD technology. The proposed system incorporates a charge pump architecture that employs an improvised Dynamic Gate Biasing (DGB), Forward and Reverse Body Bias technique (FRBB), along with a time axis symmetrical clocking scheme implemented using an advanced bootstrapped CMOS driver to enhance the overall drive capability of the system at low input voltages. Post-layout extracted simulations demonstrate that the proposed system achieves higher overall efficiency, delivering a peak Power Conversion Efficiency (PCE) of 85.8% at 125 mV input voltage, outperforming other state-of-the-art architectures in similar voltage ranges. Moreover, the proposed system exhibits reliable operation even at input voltages as low as 85 mV, while maintaining good overall efficiency.

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用于超低功耗射频能量采集应用的高效 CMOS 电荷泵

本文阐述了针对射频 (RF) 能量采集应用的开关电容 DC-DC 转换器系统的设计与实现，该系统采用 180 纳米 CMOS 三阱 BCD 技术，输入电压在 150 mV 以下。该系统采用电荷泵架构，采用了改进的动态栅极偏压（DGB）、正向和反向体偏压技术（FRBB），以及利用先进的自举式 CMOS 驱动器实现的时间轴对称时钟方案，以增强系统在低输入电压下的整体驱动能力。布局后提取仿真表明，所提出的系统实现了更高的整体效率，在 125 mV 输入电压下的峰值功率转换效率 (PCE) 达到 85.8%，在类似电压范围内优于其他最先进的架构。此外，即使在低至 85 mV 的输入电压下，拟议的系统也能可靠运行，同时保持良好的整体效率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Integration-The Vlsi Journal 工程技术-工程：电子与电气

CiteScore

3.80

自引率

5.30%

发文量

107

审稿时长

6 months

期刊介绍： Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.