Analysis and Design of an Active Rectifier for Wireless Power Transfer in 90 nm CMOS Technology

Abstract

In this paper, an analysis and design of a new active rectifier used for wireless power transfer applications using 90 nm CMOS technology are presented. The proposed architecture of the active rectifier has mainly been chosen to improve the VCE and the PCE and also to eliminate the need for large on-chip capacitors. The proposed circuits eliminate the drop needed for conduction by replacing diode-connected nMOS devices with others controlled by an active circuit. The new architecture of the active rectifier has been designed, simulated, and laid out by Cadence Virtuoso using TSMC 90nm technology. The input range is 0–5 V, and the output voltage is 2.14 V, with the VCE and the PCE values of 82.9% and 86.2%, respectively. The layout utilizes a compact space of 0.0597 mm2 within the TSMC CMOS 90 nm technology.