Design of CMOS Analog Front-End Local-Field Potential Chopper Amplifier With Stimulation Artifact Tolerance for Real-Time Closed-Loop Deep Brain Stimulation SoC Applications

Chung-Yu Wu;Chi-Wei Huang;Yu-Wei Chen;Chin-Kai Lai;Chung-Chih Hung;Ming-Dou Ker
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Abstract

A CMOS analog front-end (AFE) local-field potential (LFP) chopper amplifier with stimulation artifact tolerance, improved right-leg driven (RLD) circuit, and improved auxiliary path is proposed. In the proposed CMOS AFE LFP chopper amplifier, common-mode artifact voltage (CMAV) and differential-mode artifact voltage (DMAV) removal using the analog template removal method are proposed to achieve good signal linearity during stimulation. An improved auxiliary path is employed to boost the input impedance and allow the negative stimulation artifact voltage passing through. The common-mode noise is suppressed by the improved RLD circuit. The chip is implemented in 0.18- ${{\bf \mu m}}$ CMOS technology and the total chip area is 5.46-mm 2 . With the improved auxiliary path, the measured input impedance is larger than 133 M ${\bm{\Omega}}$ in the signal bandwidth and reaches 8.2 G ${\bm{\Omega}}$ at DC. With the improved RLD circuit, the measured CMRR is 131 – 144 dB in the signal bandwidth. Under 60-μs pulse width and 130-Hz constant current stimulation (CCS) with ±1-V CMAV and ±50-mV DMAV, the measured THD at the SC Amp output of fabricated AFE LFP chopper amplifier is 1.28%. The measurement results of In vitro agar tests have shown that with ±1.6-mA CCS pulses injecting to agar, the measured THD is 1.69%. Experimental results of both electrical and agar tests have verified that the proposed AFE LFP chopper amplifier has good stimulation artifact tolerance. The proposed CMOS AFE LFP chopper amplifier with analog template removal method is suitable for real-time closed-loop deep drain stimulation (DBS) SoC applications.
为实时闭环深部脑刺激 SoC 应用设计具有刺激误差容限的 CMOS 模拟前端局部场电位斩波放大器。
本文提出了一种具有刺激伪影容限、改进型右腿驱动(RLD)电路和改进型辅助路径的 CMOS 模拟前端(AFE)局部场电位(LFP)斩波放大器。在所提出的 CMOS AFE LFP 斩波放大器中,使用模拟模板去除法去除共模伪像电压(CMAV)和差模伪像电压(DMAV),以在刺激过程中实现良好的信号线性度。采用改进的辅助路径来提高输入阻抗,并允许负刺激伪像电压通过。改进的 RLD 电路可抑制共模噪声。芯片采用 0.18μm CMOS 技术实现,总面积为 5.46 平方毫米。通过改进的辅助路径,测量到的输入阻抗在信号带宽内大于 133 MΩ,在直流时达到 8.2 GΩ。采用改进的 RLD 电路后,测得的 CMRR 在信号带宽内为 131 - 144 dB。在 60μs 脉宽和 130-Hz 恒流刺激(CCS)条件下,±1-V CMAV 和 ±50-mV DMAV,AFE LFP 斩波放大器 SC Amp 输出端的总谐波失真(THD)测量值为 1.28%。体外琼脂测试的测量结果表明,向琼脂注入 ±1.6 mA CCS 脉冲时,测得的总谐波失真为 1.69%。电气和琼脂测试的实验结果验证了所提出的 AFE LFP 斩波放大器具有良好的刺激伪影耐受性。采用模拟模板去除方法的拟议 CMOS AFE LFP 斩波放大器适用于实时闭环深排水刺激(DBS)SoC 应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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