Performance Efficient and Fault Tolerant Approximate Adder

Asma Iqbal, Syed Affan Daimi, K. Manjunatha Chari
{"title":"Performance Efficient and Fault Tolerant Approximate Adder","authors":"Asma Iqbal, Syed Affan Daimi, K. Manjunatha Chari","doi":"10.1007/s10836-023-06092-5","DOIUrl":null,"url":null,"abstract":"<p>Fault tolerant adders are an important design paradigm to improve the robustness of the adder while at the same time improving the yield. The major downside of fault tolerant adders are the additional modules that are intrinsic to this design. On the other hand, approximate adders take the advantage of computing resilience and inherently improve the area, delay &amp; power metrics. A combination of these two seemingly contradictory approaches are juxtaposed to put forth a design for robust fault tolerant approximate adders that mitigate the effects of redundancy and would help improve the yield. The fault tolerant schemes included are the Triple Modular Redundancy and Partial Triple Modular Redundancy. These are used in conjunction with the approximate Lower part-OR Adder (LOA). The designed fault tolerant approximate adder along with the fault intolerant precise and fault intolerant imprecise adder is used for image sharpening using the Gaussian filter. The results analyzed in the presence and absence of faults indicate that the visual quality of the image in the presence of a single stuck-at fault is almost as good as that obtained without a fault and maintains a PSNR of above 27 in case of fault tolerant approximate adder. There is a significant loss in the image quality if a fault occurs in a non-redundant precise or approximate adder. The deterioration in image quality is more significant if a stuck-at-one fault occurs, as the image becomes visually indecipherable.</p>","PeriodicalId":501485,"journal":{"name":"Journal of Electronic Testing","volume":"32 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2023-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Electronic Testing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/s10836-023-06092-5","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

Fault tolerant adders are an important design paradigm to improve the robustness of the adder while at the same time improving the yield. The major downside of fault tolerant adders are the additional modules that are intrinsic to this design. On the other hand, approximate adders take the advantage of computing resilience and inherently improve the area, delay & power metrics. A combination of these two seemingly contradictory approaches are juxtaposed to put forth a design for robust fault tolerant approximate adders that mitigate the effects of redundancy and would help improve the yield. The fault tolerant schemes included are the Triple Modular Redundancy and Partial Triple Modular Redundancy. These are used in conjunction with the approximate Lower part-OR Adder (LOA). The designed fault tolerant approximate adder along with the fault intolerant precise and fault intolerant imprecise adder is used for image sharpening using the Gaussian filter. The results analyzed in the presence and absence of faults indicate that the visual quality of the image in the presence of a single stuck-at fault is almost as good as that obtained without a fault and maintains a PSNR of above 27 in case of fault tolerant approximate adder. There is a significant loss in the image quality if a fault occurs in a non-redundant precise or approximate adder. The deterioration in image quality is more significant if a stuck-at-one fault occurs, as the image becomes visually indecipherable.

Abstract Image

性能高效且容错的近似加法器
容错加法器是一种重要的设计范例,可提高加法器的鲁棒性,同时提高产量。容错加法器的主要缺点是这种设计需要额外的模块。另一方面,近似加法器利用了计算弹性的优势,从本质上改善了面积、延迟和功耗指标。我们将这两种看似矛盾的方法结合起来,提出了一种鲁棒容错近似加法器的设计方案,它能减轻冗余的影响,并有助于提高产量。容错方案包括三重模块冗余和部分三重模块冗余。这些方案与近似下部-OR 加法器(LOA)结合使用。所设计的容错近似加法器与容错精确加法器和容错不精确加法器一起用于使用高斯滤波器进行图像锐化。在有故障和无故障情况下的分析结果表明,在出现单个卡住故障的情况下,图像的视觉质量几乎与无故障情况下的图像一样好,并且在容错近似加法器的情况下,PSNR 保持在 27 以上。如果非冗余精确加法器或近似加法器出现故障,则图像质量会明显下降。如果发生 "卡在一 "故障,图像质量的下降会更明显,因为图像在视觉上变得难以辨认。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信