Vertically Stacked Stepped Oxide Split-Pocket VTFET as a Label Free Biosensor

IF 2.5 4区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Madhulika Verma, Sachin Agrawal, None Sujal, Mohit Meena
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引用次数: 0

Abstract

AbstractIn this manuscript, a new vertically stacked GaSb-source stepped oxide split-pocket vertical dielectrically modulated tunnel field effect transistor (SOSPVDMTFET) is presented for the first time. The novelty of this device lies in its stepped oxides with full gate length cavity and n + split-pockets in source region. These design features significantly suppress the ambipolar current at drain/channel junction and improves the drain current (ION), subthreshold swing (SS), threshold voltage (Vth), and current ratio (Iratio). In addition, it enhances the RF parameters such as transconductance (gm), maximum cut-off frequency (fT), transit time (τ), and device efficiency. It is found that the drain current sensitivity of the proposed device is 3000 times higher than the work reported in [Theja and Panchore, “Performance investigation of GaSb/Si heterojunction based gate underlap and overlap vertical TFET biosensor,” IEEE Trans. Nano Biosci., Vol. 22, no. 2, pp. 284–91, 2022]. Further, the behavior of biomolecules at different subcavity regions (R1, R2, R3) and cavity thickness has been investigated. The effect of non uniform distribution of biomolecule in cavity region is also discussed.KEYWORDS: Ambipolaritybiosensorstepped oxide (SO)split-pocket (SP)GaSb-source Stepped Oxide Split-Pocket Vertical Biosensor (SOSPVB) ACKNOWLEDGEMENTSThe authors would like to thank Dr. Shivendra Yadav from Department of Electronics Engineering, Sardar Vallabhbhai National Institute of Technology, Surat, India for providing valuable suggestions and support to carry out this research work.DISCLOSURE STATEMENTNo potential conflict of interest was reported by the author(s).Additional informationNotes on contributorsMadhulika VermaMadhulika Verma is currently pursuing the PhD degree with the ECE department from National Institute of Technology Delhi. She has completed her Mtech in micro-nano electronics (ECE) from PDPM IIITDM Jabalpur in 2017, and Btech in ECE from the IPEC Ghaziabad in 2013. Her area of interest is nanoscale devices and their biosensor applications. Email: madhulika53@nitdelhi.ac.inSachin AgrawalSachin Agrawal completed his PhD from IIITDM Jabalpur in 2018. He has completed his ME from Birla Institute of Technology Pilani, India in 2009. Currently, he is working as an assistant professor at National Institute of Technology Delhi. His area of interest is RF energy harvesting, antenna designing and mobile communication. SujalSujal is currently pursuing a Btech degree in electronics and communication engineering from National Institute of Technology Delhi, India (2020–2024). His current research interests include TFET. Email: 201220045@nitdelhi.ac.inMohit MeenaMohit Meena is currently pursuing a Btech degree in electronics and communication engineering from National Institute of Technology Delhi, India (2020–2024). His current research interests include TFET. Email: 201220029@nitdelhi.ac.in
作为无标签生物传感器的垂直堆叠阶梯式氧化物分裂口袋VTFET
摘要本文首次提出了一种新型的垂直堆叠gasb源阶梯氧化物裂口袋垂直介质调制隧道场效应晶体管(SOSPVDMTFET)。该器件的新颖之处在于其阶梯式氧化物具有全栅长腔和源区n +分裂袋。这些设计特点显著地抑制了漏极/通道结的双极电流,并改善了漏极电流(ION)、亚阈值摆幅(SS)、阈值电压(Vth)和电流比(Iratio)。此外,它还提高了射频参数,如跨导(gm)、最大截止频率(fT)、传输时间(τ)和器件效率。研究发现,该器件的漏极电流灵敏度比Theja和Panchore在《基于GaSb/Si异质结的栅极underlap和重叠垂直TFET生物传感器的性能调查》(IEEE Trans)中报道的工作高3000倍。纳米Biosci。,第22卷,no。[2],第284-91页,2022。此外,研究了生物分子在不同亚腔区(R1, R2, R3)和腔厚下的行为。讨论了生物分子在腔区不均匀分布的影响。关键词:双极性生物传感器阶梯式氧化物(SO)分裂口袋式(SP) gasb源阶梯式氧化物分裂口袋式垂直生物传感器(SOSPVB)致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢致谢披露声明作者未报告潜在的利益冲突。作者简介:madhulika Verma目前在德里国立理工学院ECE系攻读博士学位。她于2017年完成了PDPM iii itdm Jabalpur的微纳电子学(ECE)硕士学位,并于2013年完成了IPEC Ghaziabad的ECE学士学位。她感兴趣的领域是纳米级器件及其生物传感器应用。sachin Agrawal于2018年在印度贾巴尔普尔理工学院(IIITDM)获得博士学位。他于2009年完成了印度皮拉尼Birla理工学院的硕士学位。目前,他在德里国立理工学院担任助理教授。他的兴趣领域是射频能量收集,天线设计和移动通信。SujalSujal目前在印度德里国立理工学院攻读电子和通信工程学士学位(2020-2024)。目前主要研究方向为TFET。meenamhit Meena目前正在印度德里国立理工学院攻读电子和通信工程学士学位(2020-2024)。目前主要研究方向为TFET。电子邮件:201220029 @nitdelhi.ac.in
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来源期刊
IETE Technical Review
IETE Technical Review 工程技术-电信学
CiteScore
5.70
自引率
4.20%
发文量
48
审稿时长
9 months
期刊介绍: IETE Technical Review is a world leading journal which publishes state-of-the-art review papers and in-depth tutorial papers on current and futuristic technologies in the area of electronics and telecommunications engineering. We also publish original research papers which demonstrate significant advances.
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