Hao Jin, Sen Huang, Qimeng Jiang, Yingjie Wang, Jie Fan, Haibo Yin, Xinhua Wang, Ke Wei, Jianxun Liu, Yaozong Zhong, Qian Sun, Xinyu Liu
{"title":"High-performance enhancement-mode GaN-based p-FETs fabricated with O<sub>3</sub>-Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub>-stacked gate dielectric","authors":"Hao Jin, Sen Huang, Qimeng Jiang, Yingjie Wang, Jie Fan, Haibo Yin, Xinhua Wang, Ke Wei, Jianxun Liu, Yaozong Zhong, Qian Sun, Xinyu Liu","doi":"10.1088/1674-4926/44/10/102801","DOIUrl":null,"url":null,"abstract":"Abstract In this letter, an enhancement-mode (E-mode) GaN p-channel field-effect transistor (p-FET) with a high current density of −4.9 mA/mm based on a O 3 -Al 2 O 3 /HfO 2 (5/15 nm) stacked gate dielectric was demonstrated on a p ++ -GaN/p-GaN/AlN/AlGaN/AlN/GaN/Si heterostructure. Attributed to the p ++ -GaN capping layer, a good linear ohmic I − V characteristic featuring a low-contact resistivity ( ρ c ) of 1.34 × 10 −4 Ω·cm 2 was obtained. High gate leakage associated with the HfO 2 high- k gate dielectric was effectively blocked by the 5-nm O 3 -Al 2 O 3 insertion layer grown by atomic layer deposition, contributing to a high I ON / I OFF ratio of 6 × 10 6 and a remarkably reduced subthreshold swing (SS) in the fabricated p-FETs. The proposed structure is compelling for energy-efficient GaN complementary logic (CL) circuits.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"7 1","pages":"0"},"PeriodicalIF":4.8000,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Semiconductors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1088/1674-4926/44/10/102801","RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"PHYSICS, CONDENSED MATTER","Score":null,"Total":0}
引用次数: 0
Abstract
Abstract In this letter, an enhancement-mode (E-mode) GaN p-channel field-effect transistor (p-FET) with a high current density of −4.9 mA/mm based on a O 3 -Al 2 O 3 /HfO 2 (5/15 nm) stacked gate dielectric was demonstrated on a p ++ -GaN/p-GaN/AlN/AlGaN/AlN/GaN/Si heterostructure. Attributed to the p ++ -GaN capping layer, a good linear ohmic I − V characteristic featuring a low-contact resistivity ( ρ c ) of 1.34 × 10 −4 Ω·cm 2 was obtained. High gate leakage associated with the HfO 2 high- k gate dielectric was effectively blocked by the 5-nm O 3 -Al 2 O 3 insertion layer grown by atomic layer deposition, contributing to a high I ON / I OFF ratio of 6 × 10 6 and a remarkably reduced subthreshold swing (SS) in the fabricated p-FETs. The proposed structure is compelling for energy-efficient GaN complementary logic (CL) circuits.