Chimezie Eguzo;Benedikt Scherer;Daniel Keßel;Ilja Bekman;Matthias Streun;Mario Schlosser;Stefan van Waasen
{"title":"On Automating FPGA Design Build Flow Using GitLab CI","authors":"Chimezie Eguzo;Benedikt Scherer;Daniel Keßel;Ilja Bekman;Matthias Streun;Mario Schlosser;Stefan van Waasen","doi":"10.1109/LES.2023.3314148","DOIUrl":null,"url":null,"abstract":"Building and testing software for embedded systems can be challenging with an impact on delivery time, design reproducibility, and collaboration among project contributors. To accelerate project development, presented here is an automated build flow that utilizes Xilinx PetaLinux, and field programmable gate array (FPGA) hardware description and integrates with the GitLab continuous integration and continuous deployment (CI/CD) framework for embedded targets. This build flow automates the complete process of FPGA implementation, PetaLinux configuration, and cross-compilation of software essentials for the target system-on-chip (SoC). The system has been successfully deployed in cross-compiling the control and command toolset for the Positron Emission Tomography scanner (PhenoPET) and the implementation of the message queuing telemetry transport (MQTT) service on a Xilinx Zynq Ultrascale MPSoC. This approach can be easily adapted to other projects with specific requirements.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 2","pages":"227-230"},"PeriodicalIF":1.7000,"publicationDate":"2023-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Embedded Systems Letters","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10247255/","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
Building and testing software for embedded systems can be challenging with an impact on delivery time, design reproducibility, and collaboration among project contributors. To accelerate project development, presented here is an automated build flow that utilizes Xilinx PetaLinux, and field programmable gate array (FPGA) hardware description and integrates with the GitLab continuous integration and continuous deployment (CI/CD) framework for embedded targets. This build flow automates the complete process of FPGA implementation, PetaLinux configuration, and cross-compilation of software essentials for the target system-on-chip (SoC). The system has been successfully deployed in cross-compiling the control and command toolset for the Positron Emission Tomography scanner (PhenoPET) and the implementation of the message queuing telemetry transport (MQTT) service on a Xilinx Zynq Ultrascale MPSoC. This approach can be easily adapted to other projects with specific requirements.
期刊介绍:
The IEEE Embedded Systems Letters (ESL), provides a forum for rapid dissemination of latest technical advances in embedded systems and related areas in embedded software. The emphasis is on models, methods, and tools that ensure secure, correct, efficient and robust design of embedded systems and their applications.