{"title":"Microeconomics of metrology, yield, and profitability in 300 mm manufacturing","authors":"K. Monahan, A. Chatterjee, G. Falessi","doi":"10.1109/ISSM.2000.993615","DOIUrl":null,"url":null,"abstract":"Simple microeconomic models that directly link metrology, yield, and profitability are rare or non-existent. In this work, we introduce and validate such a model. Using a small number of input parameters, we explain current yield management practices in 200 mm factories. The model is then used to extrapolate requirements for 300 mm factories, including the impact of simultaneous technology transitions to 130 nm design rules, copper interconnect, and integrated metrology. We show that the dramatic increase in value per wafer at the 300 mm transition becomes a driver for increasing metrology capability, despite a concomitant increase in cost. As expected, the model results are strongly dependent on product type (memory, chipset, or microprocessor) and process maturity.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSM.2000.993615","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Simple microeconomic models that directly link metrology, yield, and profitability are rare or non-existent. In this work, we introduce and validate such a model. Using a small number of input parameters, we explain current yield management practices in 200 mm factories. The model is then used to extrapolate requirements for 300 mm factories, including the impact of simultaneous technology transitions to 130 nm design rules, copper interconnect, and integrated metrology. We show that the dramatic increase in value per wafer at the 300 mm transition becomes a driver for increasing metrology capability, despite a concomitant increase in cost. As expected, the model results are strongly dependent on product type (memory, chipset, or microprocessor) and process maturity.