Technologies and challenges of fine-pitch backside via-last 3DIC TSV process integration and its electrical characteristics and system applications

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2014-04-28 DOI:10.1109/VLSI-TSA.2014.6839695

E. Chen, T. Hsu, Cha-Hsin Lin, P. Tzeng, Chung-Chih Wang, Shang-Chun Chen, Jui-Chin Chen, Chien-Chou Chen, Y. Hsin, Po-Chih Chang, Yiu-Hsiang Chang, Shin-Chiang Chen, Yu-Ming Lin, S. Liao, C. Ko, C. Zhan, Hsiang-Hung Chang, C. Chien, Yung-Fa Chou, D. Kwai, W. Lo, T. Ku, M. Kao

引用次数: 2

Abstract

Technologies of fine-pitch backside via last 3DIC through silicon via (TSV) process are developed to be applied to the mass production of 3D IC products. The detailed process development key points and challenges are disclosed. The electrical data are also analyzed to check the TSV process. Also, its application in real 3DIC system is demonstrated to show the benefits of system form factor and frame rate.

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细间距后通孔3DIC TSV工艺集成技术与挑战及其电气特性与系统应用

为应用于3D集成电路产品的量产，开发了细间距后壁通孔(TSV)工艺。详细地揭示了工艺开发的关键点和挑战。并对电数据进行了分析，对TSV工艺进行了验证。并在实际的3DIC系统中进行了应用，验证了其在系统外形系数和帧速率方面的优势。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

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