Design and linearity analysis of a D-band power amplifier in 0.13 μm SiGe BiCMOS technology

Abstract

A two-stage D-band differential cascode power amplifier is presented, integrated using the IHP 0.13 pm SiGe BiCMOS technology. A compact layout of the cascode stage is proposed to minimize the parasitics contributing to potential instability, achieving 13 dB of gain/stage while operating at 46% of fT, using stage peaking. The PA is analyzed using Booth chart techniques showing that the amplifier can operate with greatly reduced supply and bias while maintaining linearity dynamic range. The fabricated prototype achieves P1dB, Psat, and IIP2 of 0.2 dBm, 6.2 dBm, and 25.5 dBm respectively with 26 dB overall gain. The AM-PM conversion of the PA is experimentally characterized showing phase fluctuations lower than ±1.5° in a 10 GHz bandwidth. Furthermore, it exhibits 1 dB deviation of power gain over 40 dB input power range with 0.4 V supply variation.